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TUSB4041I: GRSTz

Kurumi Hasegawa
Expert 7991 points
Part Number: TUSB4041I


Hi team,

 

I’ve got three questions on TUSB4041I GRSTz-pin. Could you kindly take a look below?

 

Q1:

Section 7.6 of the datasheet state below.

Does it mean when VDD11 is stable 10usec before VDD33, GRSTz assertion is not required?

 

Q2:

GRSTz-pin is controlled by CPU’s GPIO. Therefore it is in Hi-Z (H-level) during the VDD/VDD33 voltage rising. Is it possible to input 3ms (or longer) L-level pulse after the uboot?

 

Q3:

When GRSTz-pin is pull-downed and keep in reset state, VDD (1.1V) experienced very large current. Is it expected?

 

Best regards,

Kurumi

  • +1
    TI__Guru 60870 points

    Hello Kurumi,

    A1. GRSTz is always required, if an active reset is used then the power supply ramping order doesn't matter.  If a passive reset is used (external cap only) then VDD11 must ramp before VDD33 or at the same time.

    A2. Yes, the reset can occur after power ramp as long as the hub isn't expected to be functional before ramp.

    A3. Yes, the hub is in an indeterminate state when held in reset and power consumption will match the programming current listed in the datasheet.

    Regards,

    JMMN

  • 0 in reply to JMMN
    TI__Expert 7991 points

    Hi JMMN,

    Understood, thank you so much for your support.

    Best regards,

    Kurumi