Other Parts Discussed in Thread: TIDA-050047, , BQ25792
We have a design similar to TIDA-050047.
The TPS25750 is connected to BQ25792 and there is no other load for VSYS apart from BQ25792.
In this configuration I see no logical reason for the back-to-back fets.
BQ25792 can accept from -2 to 30V (absolute maximum) on input and TPS25750 -0.3 to 28V (absolute maximum) and USB-C can deliver 20V max.
We have no voltages sources on our design and will be a sink only therefore cannot generate higher voltages.
Is it acceptable to remove the back-to-back fets in our design?
What is the risk, if any.