SN65DSI84-Q1: Question about the chip, SSC function?

Roy Chou1

Genius 12595 points

Part Number: SN65DSI84-Q1

Hi Team,

Some DSI bridge questions as below, please help. Thank you.

1. How to decide this REG 0x0B DSI_CLK_DIVIDER setting parameter?

2. How to decide this REG 0x12 parameter?

3. Does the chip have SSC function?

Regards,

Roy

over 2 years ago

0 David (ASIC) Liu over 2 years ago

TI__Guru*** 139835 points

Roy

For question 1 and 2, please use this tool to generate the programming value for register 0x0B and 0x12 as the value depends on the input reference/DSI clock and required LVDS output clock.

0741.DSI Tuner 2.1.zip

For question 3, SSC can be supported only if the source CLK is provided with SSC.

Thanks

David

0 Roy Chou1 over 2 years ago in reply to David (ASIC) Liu

TI__Genius 12595 points

Hi David,

We meet EMI issue about LVDS clk. We used MIPI CLK instead of REFCLK and couldn't enable the SSC function.

Do you have any countermeasure about the LVDS CLK noise? Thank you.

Regards,

Roy

0 David (ASIC) Liu over 2 years ago in reply to Roy Chou1

TI__Guru*** 139835 points

Roy

They can improve layout for better impedance discontinuity as laid out in this app note, https://www.ti.com/lit/an/snla302/snla302.pdf.

They can also add common mode filters if they can, https://product.tdk.com/system/files/dam/doc/content/emc-guidebook/en/eemc_practice_03.pdf.

Or they can switch to a ref clock that can support SSC.

Thanks

David

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SN65DSI84-Q1: Question about the chip, SSC function?