TPS65994AD: FW request

james chang

Prodigy 10 points

Part Number: TPS65994AD

HI Sir,

My platform is Intel TGL-H , and I had two TBT ports with one re-timer on each port.

But now, my TBT function didn't work. Both ports can source power, but the USB2.0 was work in one port.

Can you give me the correct setting by my design?

Another question is in the I2C master config setting, there was setting the TBT slave address at 0x40(port 2 was 0x41)

Does this address should meet the platform BIOS setting? Or I need fellow this default is better.

Thank You

James

over 3 years ago

0 Ghouse Mohiuddin23 over 3 years ago

TI__Expert 7950 points

James,

What TBT reference design are your following? Have you reached out to Intel regarding this issue yet?

0 james chang over 3 years ago in reply to Ghouse Mohiuddin23

Prodigy 10 points

Hi Sir,

I was reference the Intel TGL-H CRB (TGL_H_DDR4_RVP_Rev1P5).

And I was submit the issue on IPS too.

James

0 james chang over 3 years ago in reply to Ghouse Mohiuddin23

Prodigy 10 points

Hi Sir,

I was reference the Intel TGL-H CRB (TGL_H_DDR4_RVP_Rev1P5).

And I was submit the issue on IPS too.

James

0 Christodulos Tsongas over 3 years ago in reply to james chang

TI__Genius 12905 points

James,

If USB2.0 is not working then I would check if the plug orientation gpio is setup properly. If this is, then it is not likely the PD issue since the PD is just a pass-thru for USB2.0 signals.

As for the I2C address setting, whatever the retimer address is, that is what it should be set to.

0 james chang over 3 years ago in reply to Christodulos Tsongas

Prodigy 10 points

Hi Sir,

Do you have the binary file of the PD for TGL_H_DDR4_RVP_Rev1P5 ? Intel didn’t have this binary file.

I have another require, Can you provide the correct PD FW by my application?

Source power 5V/3A only on two ports. No any sink power.

These ports are support TBT function.

GPIO0: Retimer port2 reset.

GPIO1: Retimer port1 reset.

GPIO2: TCP0_LS en

GPIO3~4: disable

GPIO5: TCP0_ FLT

GPIO6: TCP2_FLT

GPIO7~8: disable

GPIO9: Prochot_N

If you need more detail, please let me know.

Thank You

James

0 Christodulos Tsongas over 3 years ago in reply to james chang

TI__Genius 12905 points

Jason,

You should be able to build the TGL base FW using the Application Customization Tool GUI. You can request access to this via the link:

https://www.ti.com/licreg/docs/swlicexportcontrol.tsp?form_id=325847&prod_no=TPS65994-DESIGN&ref_url=app_psil_pi

Once access is granted, you can go to Project->New Project->TPS65994AD->Tiger Lake->Intel

From there you can modify the IO Config and Source/Sink Capabilities

Thanks,

Chris

Interface

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TPS65994AD: FW request