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TSER953: Mipi lane data rate

Part Number: TSER953

Hello, 

from TSER953 datasheet I got a maximum 832 Mbps Mipi data rate (per CSI-2 lane). This is a problem if we need to directly connect TSER953 CSI port to Mipi image sensors such as IMX296/7, which can not be configured to lower speed than ~1120 Msps (single lane output only). It is not a matter of required port bandwidth, well below TSER953 capabilities, we are just talking about lane rate. Strangely, the same TSER953 datasheet says that the component is compliant to D-PHY v1.2 standard, which requires up to 2.5 Gbps/lane. Could you possibly confirm that this 832 Mbps is a real constraint to be taken into account for TSER953? If this is the case, which strategies would you suggest to handle fast sensors (up to 1.5 Gbps/lane, single lane output) with TSER953? 

Many thanks in advance

Andrea

  • Hi Andrea,

    Like you mentioned and to confirm, the TSER953 supports up to 832 Mbps per CSI-2 lane. The TSER953 cannot support data rates higher than what is in the datasheet.

    Compliance with the D-PHY v1.2 does not require the device to support up to 2.5 Gbps/lane. This just means the standard can support up to 2.5 Gbps/lane. 

    Although, we have a roadmap to support higher that 800Mbps on the serializer side. Please keep an eye out on TI.com for new product releases! :)

    Thanks,

    Lysny

  • Hello Lysny,

    thanks for the clear answer. Talking about the expected roadmap: could we possibly have a rough indication about how much serializer camera front-end lane rate will be improved compared to current 832 Mbps, and when the upgrade is going to happen?

    Many thanks

    Andrea

  • Hi Andrea,

    Unfortunately, I can't disclose any other information about the roadmap timeline or new product features publicly or without an NDA.  

    I will reach out over email to continue the conversation!

    Thanks,

    Lysny