DS90UB954-Q1: Link issue with 933.

Masanori Okano

Part Number: DS90UB954-Q1

Hi team,

What are the conditions under which the LOCK pin of the 954 goes Hi?
Does LOCK go Hi unless parallel data is input to 933?

The situation now is as follows.
The 933 and 954 are powered and PDB is Hi.
They are connected by STP cable and register 0x0C of 933 is confirmed to be 0x01.
The mode setting of 933 is 10-bit mode.
The mode setting of 954 is set as CSI-2 non synchronous Back Channel at the pin, but is changed to RAW10 by I2C.
VDD_SEL of 954 is Lo, and the register setting is as shown in the table below.

Address	Setting Value
0x0C	0x81
0x0D	0x09
0x18	0x01
0x19	0x00
0x1A	0x02
0x1B	0x0A
0x1C	0xE6
0x1F	0x02
0x20	0x30
0x21	0x01
0x32	0x00
0x33	0x21
0x4C	0x01
0x58	0x58
0x5C	0xB4
0x6D	0x7B
0x70	0x1E
0x71	0x2C
0x72	0x00
0x7C	0xC1
0xBC	0x00

best regards.

over 3 years ago

+1 Casey McCrea over 3 years ago

TI__Guru** 103215 points

Hello Okano,

For pairing with 933, the BC for 954 needs to be set to 2.5Mbps instead of 50Mbps. So you need to change 0x58 to 0x18

For RAW10 mode LOCK does not require active video/PCLK from the external source/imager:

The issue may be that the 933 is not getting configured to RAW10 mode because the BC setting is wrong. The RAW mode is actually set by the deserializer and communicated to the serializer through the back channel. So please correct the BC setting and retry your test

Best Regards,

Casey

0 Masanori Okano over 3 years ago in reply to Casey McCrea

Prodigy 230 points

Hi Casey,

The setting of register address 0x58 was changed from 0x58 to 0x18, but the LOCK pin did not go to Hi level.

Is it possible that 0x5B, 0x5C, 0x5D to 0x6C are set incorrectly?

933, the register address 0x05 is set to 0x01.
If it is set in the back channel, is it not necessary to set it?
Is it ok to leave the default register setting for 933?

Best Regards,

0 Nicholas Darash over 3 years ago in reply to Masanori Okano

TI__Mastermind 18755 points

Hi Masanori,

The value of 0x05 does not seem correct. Are you able to verify the strap resistor values on both devices meet our requirements?

Regards,

Nick

0 Masanori Okano over 3 years ago in reply to Nicholas Darash

Prodigy 230 points

Hi Nick,

I think strap resistor is set up fine.

The system is built as shown in the figure below.

954 has register settings as described earlier.
933 is left at the default setting.

In this state, the I2C waveform on the 933 side is as shown in the attached figure.

Best Regards,

+1 Nicholas Darash over 3 years ago in reply to Masanori Okano

TI__Mastermind 18755 points

Hello,

Setting 0x58 to 0x58 is fine. Can you just dump the entire register set from the 954 while it has LOCK and while it does not have LOCK and share here?

Regards,

Nick

0 Masanori Okano over 3 years ago in reply to Nicholas Darash

Prodigy 230 points

Hello,

954 has never been LOCKED.

Attached is a register dump when 954 is not LOCKED.
dump.xlsx

Regards,

0 Masanori Okano over 3 years ago in reply to Masanori Okano

Prodigy 230 points

Hello,

Waveforms obtained when not LOCK.

This is the waveform of RIN0+/- of 954.
I believe I am able to observe 2.5Mbps in the back channel.

This is the DOUT+/- waveform of the 933.
I don't know the reason for this waveform.
Is it a mismatch because the LINK is not established?

Regards,

+1 Nicholas Darash over 3 years ago in reply to Masanori Okano

TI__Mastermind 18755 points

Hello,

Where are you taking this measurement? Is this right at the pin? Can you try to take this same measurement when the pixel data is valid as well?

Regards,

Nick

0 Nicholas Darash over 3 years ago in reply to Nicholas Darash

TI__Mastermind 18755 points

Sorry I didn't mean to resolve this issue, but please try to make these measurement comparisons.

Regards,

Nick

0 Masanori Okano over 3 years ago in reply to Nicholas Darash

Prodigy 230 points

Sorry for the lack of explanation.
Currently, the LOCK has never been Hi.
I have sent the requested 954 register dump, please check it.
Please refer to "dump.xlsx"

I have attached the waveforms measured on the RIN+/- pin of the 954 and the DOUT+ pin of the 933 in hopes of helping to explain why the LOCK is not going Hi.
If you have no advice, you can ignore it.

+1 Nicholas Darash over 3 years ago in reply to Masanori Okano

TI__Mastermind 18755 points

Hello,

I thought you said above that you get LOCK when data is available, but when its not actively receiving DVP data then LOCK is lost.

I was hoping to get comparisons of the registers of both devices and waveforms.

Regards,

Nick

0 Masanori Okano over 3 years ago in reply to Nicholas Darash

Prodigy 230 points

Hi Nick,

Sorry for the late reply.
I found the reason why the link is not established.
The BIST on the 954 was set High.
Thanks a lot for all the help.

Regards,

Masanori

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DS90UB954-Q1: Link issue with 933.