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DS90UB940-Q1: problem with DS940 mipi output unstable video frame

Part Number: DS90UB940-Q1

Hi experts,

   we have mipi video frame unstable probelm with ds940.

   the enviroment is  that,  camera box output  camera frame in 1280x720 @30Hz timing to FPDLINK ser chip. and our box receive fpdlink data by ds940, then output mipi data to SOC.

   the camera box output video frame without stop,  we just  use a test app in SOC, to  in start capture then stop capture looping.

   we will enable ds940 before SOC do capture. and disable ds940 after SOC  stop capture.

   the ds940 enabling scipt is like this:

1.setup all registers

pull pdb gpio

write 0x03 to reg 0x01
write 0x04 to reg 0x06
write 0x01 to reg 0x34
write 0x20 to reg 0x6a
write 0x50 to reg 0x6b
write 0x20 to reg 0x23
write 0x13 to reg 0x6c
write 0x80 to reg 0x6d
write 0x14 to reg 0x6c
write 0x80 to reg 0x6d
write 0x13 to reg 0x6c
write 0x80 to reg 0x6d

2.force unlock, then let chip check lock
write 0x4B to reg 0x40
sleep 200 ms
write 0x43 to reg 0x40

3.read back, check pass ok
sleep 500 ms
write 0x16 to reg 0x6c
read reg 0x6d : value 0x03

4.enable mipi csi output
sleep 20 ms
write 0x13 to reg 0x6c
write 0xbf to reg 0x6d

   the ds940 disable  scipt is like this:

1. pulldown pdb gpio

this setup script follows the document < DS90Ux940N Deserializer with Bug Fixes for CSI Issues >.

but the problem still occur 1 or 2 times per 24 hours.

we have confirmed that, when picture is unstable . keep ds940 not touched, just restart SOC capture , the picture keep unstable.

please help us to fixed the unstable video issue.

thanks.

  • Hi, 

    but the problem still occur 1 or 2 times per 24 hours.
    • What is value rate of unstable video? 
    • Does instability recover on its own, or require reset/reboot to fix?
    • Issue seen immediately after power-up, or after some time of operation?
    • Can you provide full register dumps of stable and unstable condition?
    • Does issue exist if using Pattern Generation in either the camera module or from 940?
    • What serializer is being used?

    Regards, 
    Logan

  • Hi,

    1.  about 1 or 2 times per 5000 test.

    2. the unstable picture will not come back to normal, until we reset ds940 ( to pull pdb ).

    3. this issue happen randomly,  not relative to power up. as camera box always output ,  I think every time when we enable 940, this issue may happen.

    4. no full register dumps now, we will comeback later.

    5. not test yet.

    6. we don't known.

    thnks.

  • Hi, 

    Thanks for the update. Please check on some of those unknown items as well and then we will hopefully have more insight on where to debug/look further. 

    Regards, 

    Logan

  • Hi,

     update some info.

     6.  remote is DS921

     4.  the registers dumped as bellow, during the issue occur.

    # i2cdump  -f -y 3 0x30                                                 

    No size specified (using byte-data access)

         0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef

    00: 60 04 00 f0 fe 1e 04 18 00 00 00 00 00 00 00 00    `?.?????........

    10: 00 00 00 00 00 00 00 00 00 01 00 00 23 40 00 00    .........?..#@..

    20: 00 00 46 20 08 00 83 84 00 00 00 00 00 00 00 00    ..F ?.??........

    30: 00 00 90 25 11 00 00 aa 00 00 00 00 20 e0 23 00    ..?%?..?.... ?#.

    40: 43 03 03 00 60 88 00 00 0f 00 00 08 00 00 63 00    C??.`?..?..?..c.

    50: 03 10 00 01 80 00 00 00 00 7f 20 20 00 00 00 00    ??.??....?  ....

    60: 00 00 00 00 10 00 00 00 00 00 20 50 13 bf 00 00    ....?..... P??..

    70: 00 00 00 07 07 08 00 00 00 00 00 00 02 00 00 00    ...???......?...

    80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    a0: 00 00 8c 00 00 00 00 00 00 00 00 00 00 00 00 00    ..?.............

    b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    c0: 00 00 00 00 00 00 00 00 c0 00 00 00 00 00 00 00    ........?.......

    d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    f0: 5f 55 42 39 34 30 00 00 00 00 00 00 00 00 00 00    _UB940..........

    thanks

  • Hi, 

    Thanks for the update. I will review these registers and provide any feedback soon. 

    Can you also try to do 940 based PG? If issue is replicable, it might point towards issue with SoC input of CSI or CSI set-up in 940. 

    Does issue follow specific 940 PCB, does it exist across multiple 940 PCBs?

    Regards, 

    Logan

  • we have not test PG mode yet. but this issue happened in more than 3 boards.

  • Hi, 

    I don't see anything stick out in the register dump you provided. Please try to do PG from 940 and from 921 SER. This will allow us to rule out potential root-causes. 

    2.force unlock, then let chip check lock
    write 0x4B to reg 0x40
    sleep 200 ms
    write 0x43 to reg 0x40

    Where did this script snippet come from? 0x40 is a reserved register.

    this setup script follows the document < DS90Ux940N Deserializer with Bug Fixes for CSI Issues >.

    Can you provide this document? Is this from TI? 

    Regards, 

    Logan

  • Hi Logan,

     that document  has NDA limitation.  but I have provide it to may  FAE, and let him contact you. you may contact him as you wish. his mail is "dylan.you"  AT ti.com.

    thanks.

  • Thank you for pulling in Dylan and respecting the NDA sensitivity of the document. 

    Just to clarify, are you using 940 and not 940N version silicon? 

    I'm checking into the script to make sure it is aligned with required workaround script (if still 940 instead of 940N).

    Have you probed or investigated into the CSI signals/packet during issue? 

    Other items to check are: 

    • Power sequencing of 940 after 940 enable/start of SoC capture
    • 921/940 Pattern Generation
    • Check CSI signals/packet info during issue (CLK rate, LP11 state, etc)
    • Can you dump CSI registers during both ok/not-okay states? Does CSIPASS signal change in not-okay state?
    • Does SOC detect any SOT/data errors on CSI input? 
    • Does re-issuing the the CSI PLL reset (0x40=0x4B, then 0x40=0x43) cause issue to correct?

    Regards, 

    Logan

  • the chip is 90UB940Q1.  and I will come back later , and reproduce this issue to get CSI indirect register values.  thanks.