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DS90UB960-Q1: 0x4d error bit

liuyang liuyang
Prodigy 60 points
Part Number: DS90UB960-Q1
Other Parts Discussed in Thread: ALP
Hi,TI

A 953 camera is connected to the 960 deserializer,At first, the image output is normal, and then the probability data stream is disconnected.At the same time, it is found that bit [5] of 0x4d register on 960 is enabled. Its description is as follows:

"

Bi-directional Control Channel CRC Error Detected
This bit indicates a CRC error has been detected in the forward control channel. If this bit is set, an error may have occurred in the control channel operation. This bit is cleared on read.

"

Why is it normal at first, and then this bit will suddenly report an error? What causes this person to make a mistake?

Thanks.

  • 0
    TI__Mastermind 28620 points

    Hello Liuyang,

    Register bit 0x4D[5] in the 960 is set if there is a CRC error detected in the Forward Channel Link. This could indicate that the link quality between the SER/DES is not good and that the data being transferred to the DES is being affected.

    1. Can you try to read register 0x4D and register 0x4E multiple times, with some delay between each read?
      1. There are several error register bits that are cleared on read and I want to know what errors are consistently being detected by the 960.
    2. Are you able to get a stable LOCK with the connected serializer?
      1. If the LOCK_STS bit in register 0x4D is consistently 1 and the LOCK_STS_CHG bit is consistently 0 after multiple register reads, then LOCK is stable.
    3. Can you also run the built-in MAP tool in ALP, to check the quality of the channel link between the SER->DES?
      1. Here is a link to the User's Guide for the MAP tool:
      2. https://www.ti.com/lit/ug/snlu243/snlu243.pdf?ts=1650986863701&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FDS90UB960-Q1 

    Best,

    Justin Phan

  • 0 in reply to Justin Phan
    Prodigy 60 points

    Hi,

    LOCK is stable.

    0x4d bit[0]、bit[1] is stable, and the value is 1.bit[4] is 1,again read is 0.

    Just now I found that 0x4d is sometimes bit [5] error, sometimes bit [2] error.Is the error of bit [2] also caused by unstable link connection?

    Thanks

  • 0 in reply to liuyang liuyang
    TI__Mastermind 28620 points

    Hi Liuyang,

    1) When reading registers 0x4D and 0x4E on the 960, are you reading these registers multiple times, and adding some seconds of delay between each read?

    a) Since registers 0x4D and 0x4E on the 960 have bits that are cleared after each read, you would need to read these registers multiple times to identify consistent errors.

    2) Can you run the MAP tool on the 960 deserializer and post the results on this E2E forum, so that we can examine if the link quality between the SER/DES is the issue?

    Best,

    Justin Phan