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DP83867E: No link established

Walter Castellon
Prodigy 40 points
Part Number: DP83867E


Greetings,

Currently debugging yocto based embedded system using DP83867E for our Phy.

I am able to communicate with the phy through MDIO, doing a register dump I get the following in u-boot:

=> mii dump 0 0-a
0. (1140) -- PHY control register --
(8000:0000) 0.15 = 0 reset
(4000:0000) 0.14 = 0 loopback
(2040:0040) 0. 6,13 = b10 speed selection = 1000 Mbps
(1000:1000) 0.12 = 1 A/N enable
(0800:0000) 0.11 = 0 power-down
(0400:0000) 0.10 = 0 isolate
(0200:0000) 0. 9 = 0 restart A/N
(0100:0100) 0. 8 = 1 duplex = full
(0080:0000) 0. 7 = 0 collision test enable
(003f:0000) 0. 5- 0 = 0 (reserved)

1. (7949) -- PHY status register --
(8000:0000) 1.15 = 0 100BASE-T4 able
(4000:4000) 1.14 = 1 100BASE-X full duplex able
(2000:2000) 1.13 = 1 100BASE-X half duplex able
(1000:1000) 1.12 = 1 10 Mbps full duplex able
(0800:0800) 1.11 = 1 10 Mbps half duplex able
(0400:0000) 1.10 = 0 100BASE-T2 full duplex able
(0200:0000) 1. 9 = 0 100BASE-T2 half duplex able
(0100:0100) 1. 8 = 1 extended status
(0080:0000) 1. 7 = 0 (reserved)
(0040:0040) 1. 6 = 1 MF preamble suppression
(0020:0000) 1. 5 = 0 A/N complete
(0010:0000) 1. 4 = 0 remote fault
(0008:0008) 1. 3 = 1 A/N able
(0004:0000) 1. 2 = 0 link status
(0002:0000) 1. 1 = 0 jabber detect
(0001:0001) 1. 0 = 1 extended capabilities

2. (2000) -- PHY ID 1 register --
(ffff:2000) 2.15- 0 = 8192 OUI portion

3. (a231) -- PHY ID 2 register --
(fc00:a000) 3.15-10 = 40 OUI portion
(03f0:0230) 3. 9- 4 = 35 manufacturer part number
(000f:0001) 3. 3- 0 = 1 manufacturer rev. number

4. (0181) -- Autonegotiation advertisement register --
(8000:0000) 4.15 = 0 next page able
(4000:0000) 4.14 = 0 (reserved)
(2000:0000) 4.13 = 0 remote fault
(1000:0000) 4.12 = 0 (reserved)
(0800:0000) 4.11 = 0 asymmetric pause
(0400:0000) 4.10 = 0 pause enable
(0200:0000) 4. 9 = 0 100BASE-T4 able
(0100:0100) 4. 8 = 1 100BASE-TX full duplex able
(0080:0080) 4. 7 = 1 100BASE-TX able
(0040:0000) 4. 6 = 0 10BASE-T full duplex able
(0020:0000) 4. 5 = 0 10BASE-T able
(001f:0001) 4. 4- 0 = 1 selector = IEEE 802.3 CSMA/CD

5. (0000) -- Autonegotiation partner abilities register --
(8000:0000) 5.15 = 0 next page able
(4000:0000) 5.14 = 0 acknowledge
(2000:0000) 5.13 = 0 remote fault
(1000:0000) 5.12 = 0 (reserved)
(0800:0000) 5.11 = 0 asymmetric pause able
(0400:0000) 5.10 = 0 pause able
(0200:0000) 5. 9 = 0 100BASE-T4 able
(0100:0000) 5. 8 = 0 100BASE-X full duplex able
(0080:0000) 5. 7 = 0 100BASE-TX able
(0040:0000) 5. 6 = 0 10BASE-T full duplex able
(0020:0000) 5. 5 = 0 10BASE-T able
(001f:0000) 5. 4- 0 = 0 partner selector = ???

9. (0300) -- 1000BASE-T control register --
(e000:0000) 9.15-13 = 0 test mode
(1000:0000) 9.12 = 0 manual master/slave enable
(0800:0000) 9.11 = 0 manual master/slave value
(0400:0000) 9.10 = 0 multi/single port
(0200:0200) 9. 9 = 1 1000BASE-T full duplex able
(0100:0100) 9. 8 = 1 1000BASE-T half duplex able
(0080:0000) 9. 7 = 0 automatic TDR on link down
(1fc0:0300) 9. 6 = 12 (reserved)

10. (0000) -- 1000BASE-T status register --
(8000:0000) 10.15 = 0 master/slave config fault
(4000:0000) 10.14 = 0 master/slave config result
(2000:0000) 10.13 = 0 local receiver status OK
(1000:0000) 10.12 = 0 remote receiver status OK
(0800:0000) 10.11 = 0 1000BASE-T full duplex able
(0400:0000) 10.10 = 0 1000BASE-T half duplex able
(0300:0000) 10. 9- 8 = 0 (reserved)
(00ff:0000) 10. 7- 0 = 0 1000BASE-T idle error counter

Looking at td_a_p and td_p_b I can see the keep alive pulse but nothing else when I connect rj45 cable.  

  • 0
    TI__Mastermind 40205 points

    Hello,

    Can you please describe the cable you are using? What type and length is it?

    What is the link partner of this PHY? What is the desired speed of your application? It appears you have autonegotiation set for 100/1000. Does the link partner have their auto-negotiations set for these speeds as well?

    Can you provide datasheet of RJ-45? I am concerned that the PHY to RJ-45 connection may have been set incorrectly. 

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    Prodigy 40 points

    Hello Gerome,

    Currently using a 6ft cat 6 cable into a tp-link tl-sg1005d gigabit switch.  looking up the datasheet for my switch it appears to support autonegotiation for 10/100/1000.  Desired speed can be 100mbs using for basic telemetry.  RJ45 port is a pulse JXD2-0015NL

    productfinder.pulseeng.com/.../JXD2-0015NL.pdf

  • 0 in reply to Walter Castellon
    TI__Mastermind 40205 points

    Hi Walter,

    Can you please measure CLK_OUT and ensure that it is +/- 50 ppm?

    Can you also please read registers 0x6E and 0x6F and report back values? These are extended registers and will require extra steps to access. Please see section 8.4.2.1 for more information.

    Can you also read register 0x1 multiple times over? As well as register 0x11?

    Can you also confirm voltage measurements on power pins as well as INT/PWDN and RESET?

    Can you try other link partners as well as cable types and lengths?

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    Prodigy 40 points

    Measuring off of pin 18 seems to be pretty solid 

    https://abracon.com/Resonators/abm7.pdf

    according to datasheet crystal should be 30ppm stable.

    Plugged in a 4 ft 568-A cable into a netgear GS108pe and read the following from the registers:

    contents of register:

    6E: 0x8820

    6f: 0x0170

    01: 0x7949

    11:0x0302

    int/pwdn: 2.35v

    reset: 3.167v

  • +1 in reply to Walter Castellon
    TI__Mastermind 40205 points

    Hello Walter,

    It appears from the register information that RX_CTRL was not properly strapped. You do have the correct resistors designed into the schematic, but there may be something else driving the node that the pin is sampling off of. It could potentially be the MAC setting an external voltage in the middle of the resistor divider strap network. This configuration only works assuming that it is the only thing setting the voltage at the pin at the time the PHY is sampling. If the MAC is driving the lines for whatever reason, this can cause different voltages to show up and thus, a different mode for the PHY to go into.

    A fix for this is located at footnote 1 of table 6. Please set bit[7] of Reg 0x31 to '0'. 

    Sincerely,

    Gerome