This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90UH949-Q1: How to set the register for External PCLK + internal pattern generator

Part Number: DS90UH949-Q1
Other Parts Discussed in Thread: ALP

Hi Team,

Would like to know if I want to generate below input signal from 949 to 948.

how should I set the register on 949? (by using Analog LaunchPAD)

PCLK:109.42 MHz (external clock from pulse generator)

 Active size:1920H x 720V

Total size: 2184H x 835V

Regards

Tommy

  • Hi Tommy, 

    The 949 does not support a standalone REFCLK input, HDMI CLK is used for the timing of device. 

    Regards, 

    Logan

  • Hi Logan,

    Thank you for the reply. Understand, so basically we could not use external clock + internal gen to create a signal.

    Is it possible to generate the same solution SPEC as below by all internal pattern gen?

    If yes, could you advice how to setup and  operate by LaunchPAD?

    PCLK:109.42 MHz (internal clock from device)

    Active size:1920H x 720V

    Total size: 2184H x 835V

    Regards

    Tommy 

  • Hi Tommy, 

    Yes, you can enter the required timing parameters into the PatGen tab inside ALP:

    The PCLK will be slightly off depending on the M/N divider; but this will still create the desired timing and slightly modify the refresh rate based on the actual PCLK from divider/internal CLK tolerance.

    Regards, 

    Logan

  • Hi Logan,

    I have tried to modify my LaunchPAD. seems PCLK setting is a option with max 100MHZ. so basically we could not set to exactly same 109.42 MHz by this method, am I correct?

    By the way, is there a standard setting value for sync, back porch. front porch H/V if we only know total area/ active area H/V?

    Regards

    Tommy

  • I have tried to modify my LaunchPAD. seems PCLK setting is a option with max 100MHZ. so basically we could not set to exactly same 109.42 MHz by this method, am I correct?

    That is correct. Which device profile do you have selected in ALP? When I pull up 949 in demo mode, I'm able to slightly closer by modifying the M/N values to 106MHz (58Hz). All in all, the PCLK will vary up to 10-20% percent anyways due to internal CLK accuracy, so as long as the panel can support slightly different than 60Hz, you should be fine. 

    By the way, is there a standard setting value for sync, back porch. front porch H/V if we only know total area/ active area H/V?

    This will be specified by the panel/display. Some displays have strict timing, while others not so much. 

    Regards, 

    Logan