RGMII standard asks for the introduction of delay in the clock (RX_CLK/TX_CLK) with respect to the respective data (RX_D*/RX_CTRL or TX_D*/TX_CTRL). This delay can be introduced at the source of the clock or at the receiver side. Following table should help in programming the PHY in correct RGMII mode :
If MAC’s Configuration is : |
Required PHY’s configuration |
Rgmii Align Mode on TX side |
Rgmii Shift Mode on TX side |
Rgmii Align Mode on RX side |
Rgmii Shift Mode on RX side |
Rgmii Shift Mode on TX side |
Rgmii Align Mode on TX side |
Rgmii Shift Mode on RX side |
Rgmii Align Mode on RX side |