Other Parts Discussed in Thread: DS25BR440,
Hi team,
why this reference design use different redriver to compensate?
is there a different need for clock and signal of LVDS?
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Hi Fred,
OLDIO_CLK clock is sub-multiple of the data rate. On the other hand, OLDIO_A[0:3] has higher data rate. This is why we have two different parts.
Also, DS10BR150 carries one differential clock pair versus DS25BR440 carries four differential pairs.
Regards,Nasser