TPS65987DDJ: Reckoning in "singularity" in some TPS65987DDJ specimens when ADCIn1 or ADCIn2 are tied to LDO_3V3 without any slight drop (divider pull-down) on them.

Georg Mussenden

Part Number: TPS65987DDJ

We are experiencing same issues as described on

1) https://e2e.ti.com/support/interface-group/interface/f/interface-forum/810442/tps65987d-about-10-of-pcbas-using-tps65987d-do-not-supply-any-power?tisearch=e2e-sitesearch&keymatch=TPS65987D%2520ADCIn1#

and

2) https://e2e.ti.com/support/interface-group/interface/f/interface-forum/812534/tps65987d-i2c-address-for-i2c1-port?tisearch=e2e-sitesearch&keymatch=TPS65987D%2525252525252520ADCIn2%2525252525252520I2C1#

Does anyone in the course of the last three years analyzed what exactly, on some specimens, tickles wrong the ADCIn1/2 inputs when they are tied directly (via a resistor) to LDO_3V3? We are now following the advice given on both threads of 10KΩPU/100KΩPD and the situation seems to be fixed, but are not necessarily fully confident that those values are adequate as we don't understand the physics that are at play in this "singularity" phenomenon.

Further uneasiness is brought about the fact that the latest TPS65987DDJ EVM (SLVUBS4A) shows on that the ADCIn1 divider is to be 31.6KΩPU/100KΩPD.

Please kindly explain reason for the singularity and how much the voltages (i.e. divide ratio) on ADCIn1/2 have to be reduced below LDO_3V3 to guarantee that this issue never happens.

Thanks so much!

Georg A. Mussenden

over 3 years ago

0 Tommy Lin over 3 years ago

TI__Mastermind 31190 points

Hi,

Our team member will get back to you as soon as possible.

Regards

0 Christodulos Tsongas over 3 years ago in reply to Tommy Lin

TI__Genius 12905 points

ADCIN1/2 pins are read by an ADC. In some (very rare and unusual) customer designs LDO_3V3 may not be entirely stable when the ADCIN1/2 pins are sampled. The Resistor divider helps avoid the issue.

For the voltage reduction, you can use this table:

Just multiply 3.3V * [(DIV_MIN + DIV_MAX) / 2] to get the required voltage for the voltage divider.

0 Georg Mussenden over 3 years ago in reply to Christodulos Tsongas

Intellectual 280 points

Thanks so much Tommy and Christodolus for your quick help!

Question is, is the 9.1% drop provided by the 10KΩ/100KΩ divider adequate? In other words, rather than hearing "helps avoid the issue". I'd like to hear "eliminates the issue".

Furthermore, on this picture of a DDJ on our board with no Pull-Down and which doesn't start it can be seen that LDO_3V3 is actually very clean when sampling begins. Such sampling begins a bit like 33ms after the picture's left edge (~25ms after trigger) consisting of trains of five sampling down-spikes on ADC_In1.

Also, I've been before looking at such sampling on https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1074775/tps65987ddj-what-s-the-full-scale-voltage-reference-source-for-the-tps65987d-dx-adc and would agree, per the successive sampling methodology described that what you state is feasible if LDO_3V3 were unstable during sampling, but such isn't evidenced by us.

Also, I must add that when one has a Pull-Down and the DDJ starts you only get a single train of five sample down-spikes as shown on this picture of the same board with a 200KΩ PD.

Thus in summary, the theory of "dirty" LDO_3V3 doesn't agree too well with me!

Also, your statement of "very rare and unusual" is not really true, we saw fallouts of 5~10% (on ADCIn1) just like your customers of three years ago. For me that isn't very rare and unusual!

Thanks so much,

Georg A. Mussenden

0 Christodulos Tsongas over 3 years ago in reply to Georg Mussenden

TI__Genius 12905 points

To answer your question, 10K/100K divider is adequate.

0 Georg Mussenden over 3 years ago in reply to Christodulos Tsongas

Intellectual 280 points

Thanks so much Christodulos, have an awesome WeekEnd!

0 Christodulos Tsongas over 3 years ago in reply to Georg Mussenden

TI__Genius 12905 points

No problem

0 Georg Mussenden over 3 years ago in reply to Christodulos Tsongas

Intellectual 280 points

By the way, forgot to say, TI ought to update the specs of all TPS65987Dxx devices to indicate that ADCIn1/2 are to be driven to something not all the way up to LDO_3V3 but rather slightly below (that TI is to specify). ADCIn2 is the most amusing as it states "Short to LDO_3V3"!

Also need to update at least the DDH and DDJ Datasheets on Table 8-5. Boot Mode Pin Strapping to indicate that when SPI_MISO (SPI_POCI) is low, the device won't attempt to fetch from Flash. We and some other folks found that out years ago the hard way (e.g. https://e2e.ti.com/support/interface-group/interface/f/interface-forum/760882/tps65987d-how-to-set-boot-mode-by-adcin1-and-spi_miso?tisearch=e2e-sitesearch&keymatch=TPS65987D%2525252525252520ADCIn1#)!

Again, thanks!

0 Tommy Lin over 3 years ago in reply to Georg Mussenden

TI__Mastermind 31190 points

Hi,

Thank you for letting us know about this, we will look into it.

Regards.

0 Georg Mussenden over 3 years ago in reply to Tommy Lin

Intellectual 280 points

Cool thanks so much Tommy! I'll close this as it doesn't affect me as I'm aware of the situation, but other souls that first encounter these chips would have to go through this needless turmoil if they don't have the proper info presented.

Also might want to update https://www.ti.com/lit/ds/symlink/tps65987ddj.pdf for the mis-transcribed pins 36 & 37 as indicated on https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1035107/tps65987d-spi_pico-spi_poci?tisearch=e2e-sitesearch&keymatch=TPS65987D#.

Also, perhaps TI should get into the habit of making available interim "Beta" datasheets that make available the latest updates without having to wait for the formal official release cycle. TI should be more dynamic updating the datasheets!

Have an awesome weekend!

0 Christodulos Tsongas over 3 years ago in reply to Georg Mussenden

TI__Genius 12905 points

Thanks!

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TPS65987DDJ: Reckoning in "singularity" in some TPS65987DDJ specimens when ADCIn1 or ADCIn2 are tied to LDO_3V3 without any slight drop (divider pull-down) on them.