DP83TC813S-Q1: shutdown-path implementation

Part Number: DP83TC813S-Q1

TI Team,

My customer needs to put PHY to shutdown in case of detecting any malfunctions in the system, and as long as the system gets back to normal operation. 

In this state (PHY shutdown)  task is to interrupt all communications from the PHY.

What is best way to do it?

Looking at datasheet I think ~RESET pin should be helpful, I understand PHY re-start happens on ~RESET rising edge after pulling the pin  down for >1us time.

What happens in PHY operation between ~RESET falling edge and <1us?
Does the PHY operate normally in this time? 


Also: Can ~RESET pin be hold low for as long as needed?

  • Hi Poitr,

    Between RESET_N falling edge and <1us, there will still be PHY communication for some time.

    RESET_N can be held low as long as need.

    Please let me know if you need more details.

    --
    Regards,
    Gokul.

  • Thank you Gokul,

    Yes, there is one more thing:
    There is concern that after triggering reset all registers must be re-configured, and this takes time.
    Also PHY shutdown must be tested during 1st PHY inicalisation, so system startup time will be extended twice (startup --> PHY initialization --> PHY shutdown using RESET --> PHY initialization).

    Is there any alternative to implement PHY shutdown function - other than using RESET_N?

    What about using TX_EN pin for PHY shutdown function?

    When TX_EN is low, no data can be transmitted through the Ethernet PHY.
    But if it gets asserted during a frame transmission, what will be the status of the frame?
    Will the PHY register it as corrupted and drop it?

    Additional question if we would like to overwrite the MAC, what driver strength can we use? (This one we can calculate from the Input levels of the PHY.)
    So from this point of view it would make sense to drive the TX_EN pin, and then the register setup will not be restored to default, so the PHY stays configured during startup.

    Please let me know,
    Piotr 

     

  • Hi Poitr,

    We need not go to all the trouble to implement the power down mode. We have a standby mode to stop the device from any communication without losing the register content.

    Standby Mode:
    Please refer to register 0x018C. Program 0x018C = 0x0010 to put the device in standby mode. Most of the circuits are turned off inside the device and the power consumption is minimized.
    You can program 0x018C = 0x0001 to put the device back into the functional mode.

    --
    Regards,
    Gokul.

  • Hi Gokul,

    Unfortunately register 0x018C cant be used to put ETH communication shutdown path due to system-level constrains. 

    What about using TX_EN pin for PHY shutdown function? Would that work, what are limitations? 

  • Hi Gokul,

    Unfortunately register 0x018C cant be used to put ETH communication shutdown path due to system-level constrains (it has to be independent from software).

    What about using TX_EN pin for PHY shutdown function? Would that work, what are limitations? 

  • Hi Poitr,

    Forcing TX_EN to low from the MAC only stops the data from DUT side to Link partner (LP) side. The DUT will still be linked up and transmitting IDLE symbols to the LP.

    If there is incoming data from LP side to DUT side, it can't be stopped.

    If the problem is using software to stop the communication, then you can configure INT_N as a Power Down pin. In this case, you can drive the pin low to put the device in power down mode.

    The drawback with this will be losing the Interrupt functionality of the PHY.

    Please let me know if this works for you.

    --
    Regards,
    Gokul.