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DS90UB933-Q1: DS90UB933-Q1 The screen will flash？

kevin.huang_FJXM
Expert 2925 points
Part Number: DS90UB933-Q1

hi Team

At present, it is found in the actual boarding test that the control screen will flash on the 360 look around interface (see Annex),

one At present, the frequency of PCLK is set to 95MHz, which is close to the limit value of 100MHz required by 933 / 934. Is it possible that this PCLK is too high or for other reasons? Can you help analyze it;

two Is there any instrument that can monitor whether the video picture of 934 output bt656 signal is abnormal;

  • 0
    TI__Mastermind 28240 points

    Hello Kevin,

    If the PCLK frequency being inputted into the 933 is 95MHz, then this is within the datasheet specs and should not pose an issue. But you also need to make sure that other parameters of PCLK are met as well, such as the period, high/low times, and jitter. 

    1. Can you measure the PCLK signal inputted to the 933 device and verify that the period, high/low times, and jitter are within the datasheet specifications?
      1. These datasheet specs are defined in Section 6.6 Recommended Serializer Timing For PCLK in the 933 datasheet.
    2. Can you also check if a stable LOCK has been established between the connected 933 and 934 devices, by reading register 0x4D on the 934 device?
      1. Read register 0x4D several times, with a few ms of delay between each read. The LOCK_STS register bit shows the current status of LOCK and the LOCK_STS_CHG register bit shows if LOCK has changed since the last read of this register. A stable LOCK means that LOCK_STS is consistently set to 1 and the LOCK_STS_CHG register is always 0.

    Best,

    Justin Phan