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DP83848-EP: Power-up stabilization period

Part Number: DP83848-EP

The datasheet, section 3.5.1, describes a 167ms initialization time.

1. From the diagram, MDC is low during this time.  Is this a requirement on the external device supplying the clock, that it MUST be low for 167ms?

2. What is the impact if the external device tries to use the MDIO/MDC interface during the first 167ms?  Can it stop the PHY working correctly?

Thanks!