DP83848-EP: Power-up stabilization period

Part Number: DP83848-EP

The datasheet, section 3.5.1, describes a 167ms initialization time.

1. From the diagram, MDC is low during this time.  Is this a requirement on the external device supplying the clock, that it MUST be low for 167ms?

2. What is the impact if the external device tries to use the MDIO/MDC interface during the first 167ms?  Can it stop the PHY working correctly?


  • Hi Mat,

    1. MDC must stay low or high, but not oscillate during this 167ms initialization time, as this would signify the start of the preamble.

    2. Reads/Write will not work correctly during this time, and an improper write could potentially cause bigger issues. Please follow the datasheet requirements and do not attempt to access the MDC/MDIO interface prior to 167ms after power up. 



  • Thanks.  My underlying concern is that my uboot may not be aware of this mandatory delay.