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DP83TC813S-Q1: DP83TC813S-Q1

Part Number: DP83TC813S-Q1
Other Parts Discussed in Thread: DP83TC811

Dear Technical Support,

I am Tibor Abai, HW engineer at Robert Bosch, Budapest. I had some correspondence with your colleague, Piotr Fiszer who suggested to turn to You.

I have the following questions:

1. TDRWhere do I get the SNLA389 Application Note where we see the "initialization settings" and "Pre-TDR configuration"?

2. Interrupt: Is the bit 2 (force_interrupt) of PHYSCR register for driving the INT pin to change state immediately when it is set to 1 or makes it possible for the ETH PHY to change the INT pin when any source of interrupt occurs during normal operation? What other register settings are needed if I want to change instantly the state of the INT pin?

As I can see this topic, the following setting is needed:

INT_OE: 1

INTEN: 1

force_interrupt: 1

int_pol: 1 (in our design as it is pulled up by a resistor)

Please confirm that this is correct this way!

3. Reset pin: In which register can we see, that the reset-pin (Pin11) is pulled to GND? In PHYRCR Register (Address = 1Fh) [Reset = 0000h] at the Bit 15? If yes, could we read this value in normal state (“0” expected) pull the Pin11 to GND (“1” will be read if reading during Reset is possible), then pull the Pin11 back to HIGH and read “0” again”. If yes, are other registers needed, which first have to be set?
If no, how can we test the Reset-Pin?

Thank You!

  • Hello,

    1) SNLA389 is available online on DP83TC813's product folder page.

    2) This acts the same ways as DP83TC811's Reg 0x11[2] where this is a test interrupt.

    3) We do not have reset monitoring capabilities. Whenever the PHY is reset, the registers will be wiped back to default. What is the intended use case for this?

    Sincerely,

    Gerome