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TCAN4550: Register problem of TCAN4550

XIN LUO
Intellectual 310 points
Part Number: TCAN4550

Hello TI engineer:

      Our company is using the TCAN4550 chip, and there is a problem in use: in the normal use of the TCAN4550 chip, the bit3 of the register 0x000c (as shown in the figure below) will always be 1, but occasionally bit3 will be 0. I checked the datasheet and there is no more detailed description of this bit, may I ask under what circumstances will bit3 become 0.

Looking forward to your reply
Best regards
hanc

  • 0
    TI__Guru 74282 points

    Xin,

    This bit only means that the device is accessing internal memory due to a SPI transaction. It auto updates itself, and thus it will change from 0 to 1 and back on its own depending on what the device is doing at that time. This won't cause any runtime issues.

    Regards,

    Eric Hackett 

  • 0 in reply to Eric Hackett
    Intellectual 310 points

    Thanks！Another problem is which registers indicate that the tcan4550 is not working properly？

    Best regards

  • 0 in reply to XIN LUO
    TI__Guru 53575 points

    Hi Xin,

    There are a variety of status registers available in TCAN4550 that will indicate different conditions or situations. Is there a particular "not working" case you are looking for? For example, the SPI_error_interrupt in the Status Register (h000C) indicates that TCAN4550 has detected a problem with a SPI transaction. This would be helpful when debugging SPI communications, but would not for example indicate if there was a problem with the CAN transceiver. 

    To determine what indications are important to your application, I would recommend reviewing the Status Register (h000C) and Interrupt Registers (h0820 - h0824). Let us know if you have any questions about these statuses represented by these register values or if there's a status you believe is unrepresented here. 

    Regards,
    Eric Schott