Hi all,
I have a question on the I/F of RGMII.
The Tr / Tf specification is 0.75ns (max), but when the FPGA drive is adjusted to satisfy this specification, the PHY receive pin (TXD) shows an undershoot as shown below.
There is about 4.5 inches between the PHY and the FPGA.
Is this undershoot acceptable?
Regards,
Toshi
