DP83869HM: copper to SGMII mode boot strap configurations & Power sequences issue

Rajesh R

Prodigy 110 points

Part Number: DP83869HM
Other Parts Discussed in Thread: DP83869

Issue #1: We have configured the PHY in copper to SGMII mode which have below boot strap configurations.

JTAG TDO(PIN 22): OPEN

RX-D2(PIN 35): PULLED TO VDDIO WITH 2.49K RES

RX-D3 (PIN 36): PULLED TO VDDIO WITH 2.49K RES

Strap setting for functional modes:

1. LED0: Pulled to ground with 2.49K resistor

2. LED1: Pulled to ground with 2.49K resistor

3. LED2: Pulled to ground with 2.49K resistor

We have powered up and checked the voltage across the LED strap resistor which is 0V.

We could not able to establish the link at 100BASE-TX and SGMII.

Issue #2: Power Sequence issue (Three Supply Configuration)

Below are the Three supply configuration in datasheet:

Below are the three supply configuration on Board:

Step #1: Below are the VDDA2P5 t1 Supply ramp time is 42ms as per the datasheet it's correct. Pls refer the below image

Step #2: Below are the VDDA1P1 t1 Supply ramp time is 70ms delay is there think is like Both are not same time "ON" (VDDA2P5 & VDDA1P1). Pls refer the below image

Step #3: Below are the VDDIO1P1 t2 Time instance at which VDDIO starts up is 137ms is there think is like in datasheet t2 max is 50ms. Pls refer the below image

Step #3: Below are the VDDA1P8 t3 Time instance at which VDDA1P8_x starts up is 201ms is there think is like in datasheet t3 max is 50ms. Pls refer the below image

Please verify the above straps, whether we have configured for Copper to SGMII or not and also please verify the Power sequence, Whether it's right or wrong

Also, Help us to bring up the PHY.

Thanks

over 4 years ago

0 Hillman Lin over 4 years ago

TI__Mastermind 26205 points

Hi Rajesh,

I double check with the strap setting you currently have. For SGMII to copper mode, we need pin 22 pulled low to 2.49kohms instead of open. You are correct on Pin 35 and 36 which required to pulled high.

Your power supply reading is correct. However, we are not expecting VDDIO to have a sudden jump. Could you double check on that as well? Could you re measure the power sequence after changing the strap setting?

Regards,
Hillman Lin

0 Rajesh R over 4 years ago in reply to Hillman Lin

Prodigy 110 points

Hello Hillman,

Thanks for reply!!!

Now in design configuration setting is 100base-Tx to 100base-Fx I 've double checked, But still link is not establish(port led is not blinking) to RJ45 to PHY then what we do?

Also, Help us to bring up the PHY.

0 Hillman Lin over 4 years ago in reply to Rajesh R

TI__Mastermind 26205 points

Hi Rajesh,

For further debug I have couple questions to ask you:

Could you let me know how did you check the configuration setting is 100base_TX to 100 base-FX?
Could also provide me the information on the register 0x0001 and 0x006E?

Regards,

Hillman Lin

0 Rajesh R over 4 years ago in reply to Hillman Lin

Prodigy 110 points

Hello Hillman,

Thanks for reply!!!

Could you let me know how did you check the configuration setting is 100base_TX to 100 base-FX?

Ans: As per the schematic Functional Mode strap setting is below I've highlighter in yellow

Could also provide me the information on the register 0x0001 and 0x006E?

Ans: As per the design we didn't used any MCU & MPU in this design, Below are circuit FYR

Note: without MCU & MPU DP83869 is working?

Help us to bring up the PHY.

Thanks

0 Hillman Lin over 4 years ago in reply to Rajesh R

TI__Mastermind 26205 points

Hi Rajesh,

I will have a schematic review on your 869 PHY to help you on further debug. It might take 3 to 5 business day.

However, it would be really helpful to debug if you can have an access to register.

Regards,

Hillman Lin

0 Hillman Lin over 4 years ago in reply to Hillman Lin

TI__Mastermind 26205 points

Hi Rajesh,

One more quick comment, Could you try to disable the Mirror mode and try to see if there is an link up?

Regards,

Hillman Lin

0 Rajesh R over 4 years ago in reply to Hillman Lin

Prodigy 110 points

Hi Hillman,

Thanks for reply!!!

FYI, Below are the mirror mode setting, current setting is disabled

Thanks

0 Hillman Lin over 4 years ago in reply to Rajesh R

TI__Mastermind 26205 points

Hi Rajesh,

Without the register there are only limited thing that we can do:

Could you take a snapshot of the line to see if there is any activity on the cable?
See the PHY is power up correctly in the CLK_OUT
Check rather Rbias is 1V
double check on the fiber connection and make sure it does not have any activity?
Need to correct the power up sequence in your board.
Meanwhile, I will double check with the schematic design.

Regards,

Hillman Lin

0 Hillman Lin over 4 years ago in reply to Hillman Lin

TI__Mastermind 26205 points

Hi Rajesh,

Here are some comment I put for your schematic design:

869 June 24th.xlsx

Regards,

Hillman Lin

0 Rajesh R over 4 years ago in reply to Hillman Lin

Prodigy 110 points

Hello Hillman,

Sorry for the Delay!

PFA Copy of Copy_869 june 24th.xlsx.

Thanks

Rajesh R

Copy of 869 June 24th.xlsx

0 Hillman Lin over 4 years ago in reply to Rajesh R

TI__Mastermind 26205 points

Hi Rajesh,

I think your schematic looks fine. Are you able to get access to the register? If not, are you able to follow the question I asked you earlier?

Regards,

Hillman Lin

0 Rajesh R over 4 years ago in reply to Hillman Lin

Prodigy 110 points

Hello Hillman,

Thanks for replying!!

FYI, RJ45 In EVK sch. 9,10,11,12 all pin are connected in GND but our sch. 9 pin connected to VCC that why I'm asking you which one is correct. Below are image

Below ae the EVK Sch.: