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DS90UB949-Q1EVM: DS90UB949-Q1EVM issue for I2C with J20 header

Part Number: DS90UB949-Q1EVM
Other Parts Discussed in Thread: ALP

Hello all,

I am trying to interface the DS90UB949-Q1EVM board using an MCU through I2C. I am also connecting the ALP tool to see the registers of SER and DESER. But the issue is, when I am connecting the ALP tool to the SER, the clock lines are observed over the J20 header of SCL pins, as well as the SDA pin, which is also having some transitions between high to low and vice-versa. It means something is already doing I2C transfers on the J20 header. But, as the schematic https://www.ti.com/lit/ug/snlu169/snlu169.pdf?ts=1655049603601&ref_url=https%253A%252F%252Fwww.ti.com%252Ftool%252FDS90UB949-Q1EVM



As seen in the schematic, attached above, I am not seeing any IC connected over SDA and SCL lines, that are initiating the I2C transactions. So please let me know what is the source of the I2C information.

On the J20 header, I have to connect an external MCU EVK. Will this already existing I2C communication affect the new I2C connection with external MCU EVK?

  • Hi Vikas,

    I think you are seeing the I2C communication between the MSP430 on the 949 EVM and the 949 serializer. As shown below, the SCL/SDA connections coming from the MCU are connected to the SCL/SCA going to J20. When the 949 EVM is connected to the ALP tool, period I2C messages are sent between the MSP430 and the 949 to provide the ALP tool with current information about the 949. 

    By connecting an external MCU, you now have two master devices on the same I2C bus communicating with the slave device (949). 

    Please let me know if you have any additional questions. 

    Sincerely,

    Ryan