TPD2E009: TPD2E009 Spice model

Hi Andrew,

It doesn't look like that SPICE model was ever created for TPD2E009. However, we do have an IBIS model for TPD2E009 if that works for you: https://www.ti.com/product/TPD2E009#design-tools-simulation 

A more modern alternative to TPD2E007 to use would be ESd752, but unfortunately we don't currently have any models for either device. I can add these to our backlog. Can you tell me when you need these models by, and what parameters you are wanting to observe in these models? 

Regards,

Matt Smith 

Hi Matt,

Thanks for the straight-forward follow-up. Unfortunately I don't have a better response on timeline than "ASAP" as I understand this particular project I was asked to help with is behind. I had taken a look at ESD752 and recommended it to a colleague, and I've also recommended we do as much work as we can with available datasheet values to move the process along. However, they are still checking on some application-level questions to find out what parameters we can work with.

Some parameters I'm interested in (which you won't know) is our expected common-mode voltage range, maximum voltage that is let-through, and specifically which ESD standard best applies. This will help me justify the ESD752, and some of that involves customer collaboration.

Some parameters I'm interested in (which a SPICE model would help us evaluate) is activation and recovery times, let-through voltage, and any unexpected integrity effects (but right now I think that's a minor concern based on datasheet capacitance values.)  What is known to us is the properties of our specific circuit - things like source and load impedances, cable and trace parasitic behavior, known operating frequency and rise-fall times.

I have only used IBIS for signal integrity rather than ESD. Maybe you can enlighten me - is IBIS also appropriate for overvoltage conditions in this case?