Other Parts Discussed in Thread: LMK05318B
Ds90ub941 displays normally when using DSI clock, but displays jitter when using external clock.
The register is configured 0x56 = 0x01
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Ds90ub941 displays normally when using DSI clock, but displays jitter when using external clock.
The register is configured 0x56 = 0x01
Monkey,
Ok, interesting - can you please send your full video timing parameters along with the script you are using to initialize 941AS?
Best Regards,
Casey
XO =24.000 MHz, CH4 = 25 MHz, CH5 = 180.25 MHz.tcs
this is lmk05318b configurations
I tried this to eliminate jitter
Hello,
Are you saying that overriding the sync widths fixed the jitter or no?
Can you try running PATGEN with internal timing and external clock to see what result this has on the screen?
If that works correctly, then please try PATGEN with external timing and external clock. Basically follow this flow chart to see where it breaks:
Are you using DSI burst mode or non-burst mode? Are you using sync events or sync pulses from the DSI source side?
Can you also share the full timing? We may need to add at least TSKIP_CNT configurations to your 941AS script at minimum. If you can send me the info above then I can help make sure you have the right 941AS configs
Best Regards,
Casey
Hi,
1. Overriding the sync widths couldn't fixed the jitter.
2. try PATGEN with internal timing and external clock,video is ok
3. try PATGEN with external timing and external clock,video is jitter
4. read DSI_VC_DTYPE Register = 0x3E,does it right?
5. I'm not sure what kind of DSI mode we are currently using,I will check with who in charge with it.
6. This is the screen parameter
Hello,
My best guess here based on the data provided is that the sync widths are not getting regenerated in the DSI stream with correct timing. It may require some deeper analysis of the DSI stream with an analyzer to see what is happening. See section 4.3 of this app note for detail https://www.ti.com/lit/pdf/snla356
Best Regards,
Casey