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TCAN4550: External loopback test mode problem

Part Number: TCAN4550

Hey,

we try to enable the external loopback test mode, but without success. After sending the data we dont receive any interrupt.

Register configuration:

1. Driver initialisation
2. In register 0x800 we have set: bit[0]=1 and bit[21]=1
3. In register 0x1010 we have set bit[4]=1
4. In register 0x1018 we have set bit[5]=0
5. Sending data to buffer0
6. Receiving data in fifo0

Notes:

After we read out the register 0x800 and the test mode is enabled, but when reading 0x1010 the bit[4] is not set. In the datasheet it also says that this register is write protected. Could here be some problem?

Thank you,

Danijel

  • Hi Danijel,

    The TCAN4550 CAN controller has "write protected" bits that can only be set when the INIT and CCE bits of the Control Register (h1018) are set to '1' to ensure that the device does not change modes while actively communicating on the CAN bus that could cause communication errors.

    Before you can configure these bits, you need to first set both the INIT and CCE bits are set to '1' before setting the other bits in the various registers.  Note that the CCE bit also requires the INIT bit to be set to '1' before it can also be set to '1' therefore you will likely need to write to this register twice in order to get both bits to be set to '1'.  After you are done configuring all of your other device registers, you can set both these bits back to '0' and start normal operation. 

    Since you have indicated that your protected bits are not getting set, I would suggest you first try setting these bits at the beginning of your configuration sequence.  If you are still having difficulties after this, please let me know.

    Regards,

    Jonathan

  • Hi Jonathan,

    I have follow your instructions but the Test register b[4] is still 0 after reading. Now I have also seen there is a function in your TCAN libraries (TCAN4x5x_MCAN_EnableProtectedRegisters) which takes additional care of the CSA and CSR bits. And after reading the CCE and INT bits are now set.

    the function was called before all other initialisation functions, as well at the end. Everything without success. Any other idea?

  • Hi Danijel,

    Try setting the TEST bit[7] of the Control Register 0x1018 to '1' before writing to the Test Register 0x1010 bit[4].  Without this bit set, the Test register is Read Only.

    Regards,

    Jonathan

  • You have been right, now b[4] of the test register 0x1010 is set. However the fifo buffer is still empty.

    The registers have now the following values when read:

    REG_MCAN_CCCR(0x1018) value = 0x9b bit[0]=1, bit[1]=1, bit[7]=1 - OK
    REG_MCAN_TEST(0x1010) value = 0x10, bit[4]=1 - OK
    REG_DEV_MODES_AND_PINS(0x800), value = 0xC82004A1, bit[0]=1 - OK

    All this three registers are set after the initialisation, because if they are before I see the device receives and sends out data normally over the transceiver, which means it is for sure not in the test mode.

    When they are set after the initialisation device stops sending data out over transceiver, which is neither correct since it should be in external loopback test mode and just the transmitter should work.

    regards, Danijel

  • Hi Danijel,

    I think we are getting close. But I am a little confused by your CCCR register value of 0x9b.  If the register value is 0x9b, then bits 0, 1, and 7 are set to '1' but so are bits 3 and 4 which correspond to a Clock Stop Request and Clock Stop Acknowledge.  These bits should not be set. 

    Also, when are you reading back the value of this register?  Is it after you have completed all of your register configuration and are trying to send data?  The INIT [0] and CCE [1] bits need to be  set back to '0' before the device can send/receive data.  Technically only the INIT bit needs to be set back to '1' but typically both bits are set.  So these bits should be the first bits set to '1' at the beginning of your register configuration, and then the last bits to be set to '0' at the end of your register configuration sequence. Once these bits are set back to '0' the device protect the register values from changes and allow it to start normal communication.

    I have done a test to verify the register bit settings and I will offer my register values and sequence as an example for you to reference.  I don't know what your bit timing parameters are, and it doesn't really matter, but I've enable the FD Operation and Bit Rate Switch.  These types of bit settings do not matter for test mode, so if you don't use them it should not matter.

    After my normal device configuration has completed I am manually going back in and doing the following register writes for this test configuration to confirm this sequence:

    M_CAN External Loop Back Test Mode:

    Write 0x1018 = 0x3C3 (Sets INIT bit)

    Write 0x1018 = 0x3C3 (Sets CCE bit now that INIT bit has been set)

    Write 0x1018 = 0x3C3 (Sets TEST bit now that CCE bit has been set)

    Write 0x0800 = 0xC80004A8 (Sets TEST_MODE_EN to '0' and TEST_MODE_CONFIG '0' because these are not used for the M_CAN Loopback test modes)

    Write 0x1010 = 0x90 (Sets LBCK to '1')

    Write 0x1018 = 0x3C0 (Sets INIT and CCE bits back to '0')

    Optionally I read my RX FIFO to make sure it is empty (which it should be)

    I send a CAN message.  I have scope probes on my CANH and CANL signals and I see the message on the CAN bus.

    I read by RX FIFO and I now see the message I just sent.

    M_CAN Internal Loop Back Test Mode:

    Write 0x1018 = 0x3E3 (Sets INIT bit)

    Write 0x1018 = 0x3E3 (Sets CCE bit now that INIT bit has been set)

    Write 0x1018 = 0x3E3 (Sets TEST bit now that CCE bit  has been set and MON bit to disable the transmitter)

    Write 0x0800 = 0xC80004A8 (Sets TEST_MODE_EN to '0' and TEST_MODE_CONFIG '0' because these are not used for the M_CAN Loopback test modes)

    Write 0x1010 = 0x90 (Sets LBCK to '1')

    Write 0x1018 = 0x3E0 (Sets INIT and CCE bits back to '0')

    Optionally I read my RX FIFO to make sure it is empty (which it should be)

    I send a CAN message.  I have scope probes on my CANH and CANL signals and I do not see the message on the CAN bus.

    I read by RX FIFO and I now see the message I just sent.

    You may be wondering why we do not set the TEST_MODE_EN bit[21] and TEST_MODE_CONFIG bit[0] of register 0x0800.  These bits are only needed if you are using one of the other two test modes.

    The TCAN4550 incorporates the Bosch M_CAN CAN FD Controller IP and a CAN FD transceiver into a single device.  The Bosch M_CAN controller register stack was copied into the device with an offset address of 0x1000.  All of the registers with an address of 0x1000 or greater are M_CAN Controller registers as defined by Bosch.  All of the other registers in the device with either an address in the 0x00xx range or 0x08xx range are defined by TI and are not M_CAN specific but control other aspects of the device. 

    There are a couple of register descriptions and features that use similar language between M_CAN and non-M_CAN registers that can cause confusion.  The test mode bits are one of these situations.  Because the TEST_MODE_EN and TEST_MODE_CONFIG bits are in register 0x0800, they apply to the test modes that route the internal TXD, RXD, and EN signals that connect the M_CAN controller to the transceiver inputs.  These signals are normally found as external signals on a PCB and therefore they need to be accessible for compliance testing purposes as shown in the Transceiver Test Mode and SPI and M_CAN Core Test Mode figures. 

    The other two loopback test modes are internal to the M_CAN controller and therefore they are configured only through the 0x10xx M_CAN register space. 

    Additional documentation on the Bosch M_CAN controller can be found in the M_CAN User's Manual on Bosh's website. (Link)

    I know this was a lot of information and a detailed answer, but I hope it is clear and answers your questions.

    Regards,

    Jonathan

  • Finally the loopback test mode works. The problem was that the INIT and CCE bits in register 0x1018 have not been set back to 0. However, the interrupt is not triggered, but i read the fifo manually, which is neither a problem.

    About the CCCR register. As much as I have understood from the datasheet in the CCCR register the bits 3,4 will be 1 if you read them, but when you perform a write they should be masked to 0. This says also the comment from the official C library:
    "Unset the CSA and CSR bits since those will be set if we're in standby mode. Writing a 1 to these bits will force a clock stop event and prevent the return to normal mode"

    Thank you a lot for your detailed help, I hope the solution helps also someone else.

    regards, Danijel