Hi team,
Customer use SN65DP159 paired with FPGA. FPGA vendor share source code of access to DP159 as below, which is repeating .
10940: PD_EN
10959 to 10963: Access control registers
10965: Disable PD_EN (= Power On)
10966 to 10971: Repeating same code as 10959 to 10964
In the repeating access, the same register access occurs, but since PD_EN is disabled, even if it is set, Self clearing does not occur unless bit 2 of 0x0A is set, and the output continues without affecting TMDS, correct?
HPD_SNK is high at the time of the above access.
Best regards,
Hayashi
