SN75DP159: Application Inquiry

Hi Renan,

1) Yes. In I2C mode, the addresses are 2-bit (4 level) over EQ_SEL/A0 and HDMI_SEL/A1

2) OE must remain high after reset for the device to stay operational (reset occurs when OE transitions from low to high). If I am understanding correctly, you could use a logic gate implementation, but use of a shunt capacitor to GND is needed in order to meet the requirement for necessary deassertion time before reset (see Section 9.3.1 of the data sheet):

3) 64.9k resistors are acceptable.

Regards,

Alex

Hello Alex,

The question now is:

As an example, let's assume we have 2x DP159 with the same I2C address.
One has OE high, the other one has OE low.

Would it be OK, I mean no conflict on the I2C bus ?

Regards,

Renan

Hi Renan,

It is not a good idea to have the same I2C address on a single I2C bus regardless of OE status. If you have more than 4 devices, you will need to use GPIO mode. Setting one or more devices to the same address is not recommended.

Thanks,

Alex

Hello Alex,

Thank you for this response.

I know that is not a good idea but the question was: does OE low disable I2C bus ? In that case we could have the same address.

Regards,

Renan

Hi Renan,

Yes. While OE is deasserted control signals are ignored. 

Regards,

Alex