DS90UH940-Q1: Can you provide the register description for register 0x3B ?

Hello PYTsai,

As mentioned in the 940 datasheet, bits[5:0] of register 0x3B indicate the Adaptive EQ (AEQ) Status. The AEQ is meant to compensate for channel and insertion losses that occur on an aging cable over its lifetime. The AEQ has 16 levels of boost compensation, and the optimal boost level is displayed in bits[5:0] of register 0x3B. After reset, the AEQ controller cycles from the least boosted level to the most boosted level, searching for a valid LOCK at each level. Upon reaching a valid LOCK, the AEQ controller stays LOCKED, and the boosted level stays constant until there is a subsequent loss of LOCK.

We hope this answers your question. More information about AEQ can be found on the CDDS under FPD-Link -> DS90Ux948-Q1 -> "DS90UH94X Adaptive Equalizer and Startup Sequence Whitepaper"

Best regards,

Abdulrahman Tabbaa