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DP83826I: SOR2_Register Register

Kai Nomiyama
Expert 5695 points

Part Number: DP83826I

Hi Team,

could you let me know how to write "SOR2_Register Register" bit [4:3] CFG_RMII_MODE / CFG_XI_50_SLAVE ?

My customer wants to change register setting from MII --> RMII and Mastermode --> Slavemode.

They tried to write "SOR2_Register Register" bit [4:3] to 11 through MDIO/MDC interface but bit[4:3] was not reflected so I'm asking this question.

there is no R/W description iin Type so do we need specific way to write it?

Regards,

Kai

  • 0
    TI__Mastermind 42815 points

    Hi Kai,

    Registers 0x467 and 0x468 are read only registers which only tell you what configurations PHY was strapped into. To configure the PHY in such a way to override strapping, please modify the respective registers outside of these fields (IE if you would like to toggle auto negotiation, please toggle register 0x0[12] instead of attempting to write register 0x468[0].

    Sincerely,

    Gerome