• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 33 subscribers
  • Views 230 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TCA9617A: TCA9517A : SCL/SDA output fall timing

user6526132
Prodigy 100 points
Part Number: TCA9617A
Other Parts Discussed in Thread: TCA9517A, TCA9554, TCA9517

I'm using it in connection with the TCA9554, but the TCA9517A's SCL/SDA fall is too fast and I can't satisfy the TCA9554's ticf (falling provision).
・Does the TCA9517A meet the I2C standard?
・Could you tell me how to deal with ticf?

  • +1
    Guru 271060 points

    The fall time limit is imposed by the I²C specification, not by the device itself, and it applies to the signal on the bus as a whole. If the falling edges are too fast, they could lead to ringing (depending on the inductance of the traces), which could result in false clock edges.

    Bus capacitance will slow down the edges. The TCA9517A's outputs are not too strong, so its edges will not actually be too fast.

  • +1
    TI__Guru 56610 points

    As clemen's has pointed out, the 9517 device is not imposing the fall time spec but the I2C spec is.

    You could put a small series resistor infront of the A side of TCA9517 to slow down the fall time but edges being too fast on I2C generally doesn't cause I2C signal integrity issues or reliability issues unless the undershoots are below the absolute minimum voltage which is usually set around -0.5V or -0.7V. And as Clemens pointed out the other option is adding capacitance though generally doing it on an I2C bus isn't desirable because I2C does limit max cap loading. 

    -Bobby