DS90UB935-Q1: Application of chip

Tonyx.wu

Part Number: DS90UB935-Q1
Other Parts Discussed in Thread: DS90UB954-Q1,

1.I2C_SDA I2C_SCL Is this I2C pin only used for output?

2.Please confirm the link mode of our product Mipi CSI -- > ds90ub935-q1 -- > ds90ub954-q1 -- > Mipi CSI. Is 935 configured by 954?

Please confirm the link mode of our product Mipi CSI -- > ds90ub935-q1 -- > ds90ub954-q1 -- > Mipi CSI. Is 935 configured by 954?

over 3 years ago

0 Darrah Merillat over 3 years ago

TI__Mastermind 29430 points

Hello, thank you for your questions.

The I2C pins are input/output signal pins. For the 935/954 your product would need to use a CSI-2 mode (see section 7.4 of the datasheet for more details and differences between modes). The modes of the devices are initially determined by the strap configurations of each device, but the 954 can reconfigure the modes via the FPD3_MODE register.

Regards,

Darrah

0 Tonyx.wu over 3 years ago in reply to Darrah Merillat

Genius 4525 points

Please confirm that we configure CSI output 1280X720@30 Whether the rgb888 format configuration table is correct and the register configuration is as follows:

//Patgen RGB888 1280x720p30 Fixed 8 Colorbar

{0xB0, 0x00},// Indirect Pattern Gen Registers

{0xB1, 0x01},// PGEN_ CTL

{0xB2, 0x01},

{0xB1, 0x02},// PGEN_ CFG

{0xB2, 0x33},

{0xB1, 0x03},// PGEN_ CSI_ DI

{0xB2, 0x24},// RGB888

{0xB1, 0x04},// PGEN_ LINE_ SIZE1 1280

{0xB2, 0x0F},

{0xB1, 0x05},// PGEN_ LINE_ SIZE0

{0xB2, 0x00},

{0xB1, 0x06},// PGEN_ BAR_ SIZE1 color bar

{0xB2, 0x02},

{0xB1, 0x07},// PGEN_ BAR_ SIZE0

{0xB2, 0xD0},

{0xB1, 0x08},// PGEN_ ACT_ LPF1 720

{0xB2, 0x02},

{0xB1, 0x09},// PGEN_ ACT_ LPF0

{0xB2, 0xD0},

{0xB1, 0x0A},// PGEN_ TOT_ LPF1 800

{0xB2, 0x03},

{0xB1, 0x0B},// PGEN_ TOT_ LPF0

{0xB2, 0x20},

{0xB1, 0x0C},// PGEN_ LINE_ PD1 //30pfs

{0xB2, 0x08},

{0xB1, 0x0D},// PGEN_ LINE_ PD0

{0xB2, 0x3B},

{0xB1, 0x0E},// PGEN_ VBP

{0xB2, 0x21},

{0xB1, 0x0F},// PGEN_ VFP

{0xB2, 0x0A},

Our requirement is CSI 4lan access 1280x720 @ 30, RGB 888 format

How to configure the register configuration?

There is also the clock configuration register configuration algorithm of clock output

It is recommended to provide a configuration table of our requirements (CSI 4lan access 1280x720 @ 30, RGB 888 format)

I configured it according to the datasheet instructions. I wonder if it is OK

0 Darrah Merillat over 3 years ago in reply to Tonyx.wu

TI__Mastermind 29430 points

Hello,

Your register configurations look good for setting your active line length, number of active lines, and total number of lines. However your bar size and line period are not correct. Details for calculating the proper values can be found in section 7.5.11 of the 954 datasheet. Also remember to enable CSI with register 0x33 = 0x01.

I've bolded changes below for you.

//Patgen RGB888 1280x720p30 Fixed 8 Colorbar

{0xB0, 0x00},// Indirect Pattern Gen Registers

{0xB1, 0x01},// PGEN_ CTL

{0xB2, 0x01},

{0xB1, 0x02},// PGEN_ CFG

{0xB2, 0x33},

{0xB1, 0x03},// PGEN_ CSI_ DI

{0xB2, 0x24},// RGB888

{0xB1, 0x04},// PGEN_ LINE_ SIZE1 1280

{0xB2, 0x0F},

{0xB1, 0x05},// PGEN_ LINE_ SIZE0

{0xB2, 0x00},

{0xB1, 0x06},// PGEN_ BAR_ SIZE1 color bar

{0xB2, 0x01},

{0xB1, 0x07},// PGEN_ BAR_ SIZE0

{0xB2, 0E0},

{0xB1, 0x08},// PGEN_ ACT_ LPF1 720

{0xB2, 0x02},

{0xB1, 0x09},// PGEN_ ACT_ LPF0

{0xB2, 0xD0},

{0xB1, 0x0A},// PGEN_ TOT_ LPF1 800

{0xB2, 0x03},

{0xB1, 0x0B},// PGEN_ TOT_ LPF0

{0xB2, 0x20},

{0xB1, 0x0C},// PGEN_ LINE_ PD1 //30pfs

{0xB2, 0x10},

{0xB1, 0x0D},// PGEN_ LINE_ PD0

{0xB2, 0x47},

{0xB1, 0x0E},// PGEN_ VBP

{0xB2, 0x21},

{0xB1, 0x0F},// PGEN_ VFP

{0xB2, 0x0A},

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DS90UB935-Q1: Application of chip