DP83867E: Ethernet Compliance and Loopback Testing Document SNLA239

jmbats

Part Number: DP83867E
Other Parts Discussed in Thread: , USB-2-MDIO

Hi,

Good day!

I want to ask how it is that the SNLA239 Application Note new revision on the TI website does not contain at all the loopback testing. I found on the internet (but not on the TI website) the previous revision and it contains both the Ethernet Compliance and Loopback Testing. I was just wondering why it was excluded in the new revision. The loopback testing I mean is the section where it is detailed the Near-End and Far-End (Reverse) loopback testing standard setup and configuration.

Also, for the 1000 BASE-T, may I ask if you can provide the test setup for Common Mode Noise Rejection? In the document, it is indicated "not included in this application note". At least a sample test setup for the DP83867E part, probably using the DP83867ERGZ-R-EVM and the USB-2-MDIO tool via MSP430 Launchpad if the launchpad is necessary for register configuration.

Best Regards,

over 3 years ago

+1 jmbats over 3 years ago

Prodigy 70 points

Also, I notice if this is really the right data to write: Reg 0x0000 = 0x0140 for 1000 Base-T Mode. I saw somewhere that it is 0x1140.

+1 Alvaro (Al-vuh-roe) Reyes over 3 years ago in reply to jmbats

TI__Mastermind 19621 points

Hi JM,

Loopback Testing details can be found in Section 8.4.4 in the Datasheet. (8.4.4.1 Near-End & 8.4.4.3 Far-End)

We are not familiar with the details for the Common Mode Noise Rejection Setup. Let us know if something is required from the PHY side to have it tested on your boards.

Please see Section 8.6 Register Maps, specifically for Table 10. Basic Mode Control Register (BMCR), Address 0x0000.

Bit 12 of Register 0x0000 Enables/Disables Auto-Negotiation.

Appendix B in the SNLA239 App note says to use 0x0140, which has Auto-Negotiation disabled and forces 1000 Base -T with Bit 6 & 13.

Regards,

Alvaro

+1 jmbats over 3 years ago in reply to Alvaro (Al-vuh-roe) Reyes

Prodigy 70 points

Thanks

0 jmbats over 3 years ago in reply to Alvaro (Al-vuh-roe) Reyes

Prodigy 70 points

Hi Alvaro,

The proper sequencing of writes is not detailed on the datasheet. Do you know where I can find it? For both Near-End and Far-End.

0 Alvaro (Al-vuh-roe) Reyes over 3 years ago in reply to jmbats

TI__Mastermind 19621 points

JM,

There is no sequence required for the Loopback Testing

Regards,

Alvaro

0 jmbats over 3 years ago in reply to Alvaro (Al-vuh-roe) Reyes

Prodigy 70 points

I mean something like this on this thread:
https://e2e.ti.com/support/interface-group/interface/f/interface-forum/789101/dp83867ergz-r-evm-far-end-loopback-test

What are the proper address writing for Near-End and Far End?

Also, referring to the link earlier, do I really need this disable EEE?

//disable EEE
000D 001F
000E 0031
000D 401F
000E 0000

Thanks.

0 Alvaro (Al-vuh-roe) Reyes over 3 years ago in reply to jmbats

TI__Mastermind 19621 points

Hi JM,

Required registers writes for loopbacks are in the datasheet(Section 8.4.4). See Register 0x000 and 0x0016. You may refer to that to enable required loopback. We are not sure about the use-case which required EEE disable so you may continue using datasheet recommendation.

We will be closing this thread. So you may start a new thread if you need further help with problem which is pushing you to evaluate the loopbacks.

Regards,

Alvaro

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DP83867E: Ethernet Compliance and Loopback Testing Document SNLA239