Reset control issue in TUSB2046IBVF

pooja ak

Other Parts Discussed in Thread: TUSB2046B

Hi Guys,

Good day...

We have designed the custom carrier board with the help of Xavier AGX SOM. Generally, after toggling reset pin USB 2.0 must enumerate where as not enumerating even after toggling. Reset pin is controlled by the SOM.
Required values observed during the toggling of reset pin. Requesting you to suggest any powerup sequence is available to handle the reset pin.
Kindly look into this and do the needful.

I have attached the schematic USB 2.0 schematic and block diagram for reference.

Thanks,

Pooja Ak

over 2 years ago

0 David (ASIC) Liu over 2 years ago

TI__Guru**** 162656 points

Pooja Ak

The TUSB2046B requires a power on reset pulse of between 100us to 3ms after 3.3-V (Vcc) reaches its 90%. Anything less than 100 us is too short for the device and anything longer than 3ms can interfere with USB enumeration (mainly an issue for embedded systems).

Can you also check on the 48MHz clock? Clock signal has to be active during the last 60 μs of the reset window.

I see EEDATA is being pulled high, can you also try to have EEDATA pulled low?

Thanks

David

0 pooja ak over 2 years ago in reply to David (ASIC) Liu

Prodigy 210 points

Dear David,

Thanks for your quick response, we will check and let me know .

Thanks,

Pooja Ak

+1 pooja ak over 2 years ago in reply to pooja ak

Prodigy 210 points

Yes we can control the rest pin and worked as we expected .
Thank you David .

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Reset control issue in TUSB2046IBVF