[FAQ] DP83867CR: How to generate recovered clock using DP83867?

To generate clock in sync with the link-partner (recovered clock of 125MHz or 25MHz) on the CLKOUT pin of DP83867 :

• program register 0x0170[12:8]  = 00000 for 125MHz 
• program register 0x0170[12:8] = 00100 for 25MHz

Note : Once programmed as above, PHY will generate the required clock frequency. It will be in sync with the link-partner only after the link is up.

Note : Jitter cleaner may be required if measured jitter is more than the end application's requirement.