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DS90UB948-Q1: FPD Link and LVDS oLDI output Diagnostics in runtime

Shubham Jagtap
Prodigy 110 points
Part Number: DS90UB948-Q1

Hello Concern,

We have use the DS90UB948-Q1 along with 949 SER - As we are getting input From 949 SER - FPD Link III and LVDS OLDI output which is going to Display unit.

So we want to observe the Connection of Input and Output that they are Intact and there is no any error in backchannel data stream and Forth.

We know there is BIST mode, but we are able to check that only at initialization stage, We want to monitor continuously during run time.

Can you please help on same.

  • 0
    TI__Mastermind 33485 points

    Hi Shubham,

    On the 949 Ser there are multiple registers you can monitor to ensure proper lock and data utilization. The general status register (0x0C) can indicate cable link detection, CRC errors, and loss of link. Register 0x0C reports any serial link faults. Section 7.3.7 of the datasheet covers this feature. There are other registers that can be checked (Dual_STS - 0x5A, General Purpose Control - 0x13).

    There are similar registers on the 948 for monitoring status.

    Regards,

    Jack Scherlag

  • 0 in reply to Jack Scherlag
    Prodigy 110 points

    Hello Jack,


    Thanks for the response and clarification.

    you mean to say that we can check the 0x0C register in run time; irrespective of BIST mode at DESER 948.Because we have DESER 948 at out board and SER 949 on Client Board. 

    As we can see then 0x0C is basically reporting the Serial Link Fault? So for the oLDI LVDS Output; is there any diagnostics functionality in DESER 948?

    Please check the attached Snap, as it showing the CRC Register is only work in BIST Mode - there is no any mentioned operation during Regular Operating.
    "The back-channel data is checked for CRC errors once the serializer locks onto the back-channel serial stream,
    as indicated by link detect status (register bit 0x0C[0] - Section 7.7). CRC errors are recorded in an 8-bit register
    in the serializer. The register is cleared when the serializer enters the BIST mode. As soon as the serializer
    enters BIST mode, the functional mode CRC register starts recording any back channel CRC errors. The BIST
    mode CRC error register is active in BIST mode only and keeps the record of the last BIST run until either the
    error is cleared or the serializer enters BIST mode again."

  • +1 in reply to Shubham Jagtap
    TI__Mastermind 33485 points

    Hi Shubham,

    Shubham Jagtap said:
    you mean to say that we can check the 0x0C register in run time

    Yes, although bit 3 can be cleared through BIST every bit can be read during run time. The CRC register referred to in the snap is the BIST BC Error Count register (0x1B). Bit 0 of register 0x0C reports the serial link fault.

    Shubham Jagtap said:
    So for the oLDI LVDS Output; is there any diagnostics functionality in DESER 948?

    There are no diagnostics for the oLDI output on the 948. 

    Regards,

    Jack

  • 0 in reply to Jack Scherlag
    Prodigy 110 points

    Thanks Jack for Clarification.