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DP83867IS: DP83867 MDC pull down resistor range/ MDC clock waveform

Louis Sankoorikal
Expert 2345 points
Part Number: DP83867IS
Other Parts Discussed in Thread: TXS0102,

Hi,

I am using the TI DP83867 phy device in my design. 

The MDIO interface from my SOC is interfaced to the  TI DP83867 phy with the TI TXS0102 device in between.

On MDC at the Phy device (after the TXS0102), we observe a drooping waveform after the MDC clock goes from Low to High which we understand is due to the internal pull down resistor on the MDC pin in the DP83867 device.

I have a few queries with respect to this interfacing:

1.    What is the spec for the internal pull down resistor on MDC? 

  • This is to understand to what level the drooping waveform will drop.

2.    Currently I am assuming that the drooping waveform after the MDC clock goes from Low to High is not a concern because the MDIO data is sampled on the rising edge of MDC.

For reference I have attached the clock waveform "TXS0102_MDC_A_Output_DroopingWaveform.jpg".

  • Kindly advise if this waveform could cause problems/ violate any DP83867 MDC input spec.

Thanks

Louis

  • 0
    TI__Mastermind 19621 points

    Hi Louis,

    The datasheet does not explicitly say the value of the internal pull down for MDC. Below is a screenshot taken from section 8.5 Programming. It states that the internal pull down for strapping pins is 9kOhm. The MDC is NOT a strapping pin, however it does share the same internal PD value in this case.

    The drop off in your waveform does seem strange. The screenshot you shared looks fine, but please verify this with all other pins and make sure that it meets the VIH/VIL specifications seen in Section 7.5 Electrical Characteristics

    Regards,

    Alvaro

  • 0 in reply to Alvaro (Al-vuh-roe) Reyes
    Expert 2345 points

    Thanks for the response Alvaro.

    The drop in MDC waveform is because I am using the TI TXS0102 interfacing device on the MDC/MDIO interface.

    The TXS0102 has a10Kohm internal pull up while the DP83867 has internal pull down (9Kohm+/-25% as per your update)

    Considering the voltage divider of 10kohm and 9kohm, the steady state value on MDC is expected to be 1.56V. However we are observing steady state value of 2.3V which makes me suspect that the internal pull down on DP83867 MDC pin is not 9kohm but value in then range of 20kohm.

    • Can you please cross check with the engineering team on this internal pull down value based on this observation?

    Regarding checking the VIH  and VIL value for other pins, I have checked the waveform for MDIO and the waveform is clean (no drooping waveform). My understanding is that drooping waveform is not present for MDIO because there is no internal pull down on DP83867MDIO pin.

    • With respect to MDC waveform, the rising edge (which is used for sampling MDIO data) is clean. Will the droop on the falling edge on MDC cause any problem (even if droops below VIH of 1.7V)? I believe falling edge of MDC is not used for sampling any data and hence the droop should not be a concern?
  • 0 in reply to Louis Sankoorikal
    TI__Mastermind 19621 points

    Hi Louis,

    The MDC PD Resistor has been cross checked and confirmed at 9kOhms.

    The line should be driven by the MCU, and in this case, the TXS0102 level shifter.  

    I do not believe the issue is with the PHY, instead it might be with the level shifter.

    MCU -> TXS0102 -> MDC Line -> PHY

    Regards,

    -Alvaro

  • 0 in reply to Alvaro (Al-vuh-roe) Reyes
    Expert 2345 points

    Ok Alvaro. Thanks for confirming the pull down resistor value 

    • With respect to MDC waveform, the rising edge (which is used for sampling MDIO data) is clean. Will the droop on the falling edge on MDC cause any problem (even if droops below VIH of 1.7V)?
    • I believe falling edge of MDC is not used for sampling any data and hence the droop should not be a concern?
  • 0 in reply to Louis Sankoorikal
    TI__Mastermind 19621 points

    Hi Louis,

    I'm not sure, but if it falls outside of the Spec range then we cannot guarantee device performance. 

    Regards,

    -Alvaro

  • 0 in reply to Alvaro (Al-vuh-roe) Reyes
    Expert 2345 points

    Thanks for the update Alvaro.

    One last question before concluding:

    • Does the VIH spec  in section 7.5 of the DP83867IS datasheet apply to the falling edge of MDC waveform?

    I believe falling edge of MDC is not used for sampling any data and hence the droop should not be a concern?

    Can this point be checked with the engineering team?

    Thanks

    Louis

  • +1 in reply to Louis Sankoorikal
    TI__Mastermind 19621 points

    Hi Louis,

    You are correct, the VIH spec does not apply to the falling edge of MDC.

    For Falling Edge, VIL should be considered, i.e. the signal should go below the VIL spec for it to be considered a '0' 

    Regards,

    Alvaro