DP83867IS: SGMII interface electrical specifications

Hi Experts,

I need your expertise regarding the following queries of our customer.

This is related to the Serial-GMII Specification

1. The SGMII specification considers that clock is sent along with data and specifies setup/ hold time with respect to the clock.
However, in my case, I do not have clock output. I am operating DP83867Phy SGMII interface in 4 wire SGMII Interface mode [Clock and data recovery are performed in the MAC and in the PHY, so no additional differential pair is required for the clock.] So in this case is the Table 5 Receiver AC specification (setup/ hold timing requirement) not applicable for me?

2. Is there any eye mask specification (including minimum eye width) provided by TI for the four-wire SGMII interface where no separate clock is used? [This is not present in the SGMII specification]

3. SGMII specification Table 3, Receiver DC Specification: Is Vidth spec of +/-50mV same as Vp-Vn > = +/-50mV?


For the background:
The customer previously asked for the DP83867IS device SGMII RX interface differential swing voltage and common mode voltage specification.
That is why I gave the Serial-GMII Specification. Above are just additional queries.

Keep safe.


Regards,

Josel