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DP83TG720S-Q1: RGMII TX has error frame while RX is normal

Part Number: DP83TG720S-Q1

Hello,

One customer used DP83TG720S for his application, he found that RGMII RX is normal, RGMII TX always exists error frame, and the error frame has jitter( the error changes and is accompanied by the correct frame).

The current hardware connection is a switch-connected PHY chip, RGMII 1Gbps.Switch does not set TX internal delay, A2D_REG_48 Register register for PHY is the default value of 960h.PHY is in RGMII TX shift mode

He would like to confirm if the problem is unstable on the transmit side of the switch or unstable sampling on the receive side of the PHY, and what is the cause of the problem. Thank you.

Best regards

kailyn 

  • Hi Kailyn,

    Apologies for the delay. E2E has been down for a few days. The usual issue with 1G RGMII is that the setup and hold time requirements are very strict, so if they are not met, the communication will fail. Please have them modify 0x602[0] and 0x304[11:8] for enabling and adjusting RX_CLK delays.

    Sincerely,

    Gerome