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DS90UB953-Q1: Questions about FPD-LINK protocol

Part Number: DS90UB953-Q1

Hi E2E team, 

I have the following questions regarding the FPD-LINK protocol: 

  1. Framesync information (latency, implementation ways)
  2.  Number of mipi lanes ? (if aggregate 4 cameras with 2 lanes each, how much lanes I will gate at the deserilazier ? or 2 cameras with 2 lanes ? what is the formula ?)
  3. There is any test equipment that I can buy to capture aggregate mipi bus (with more than 2 image sensors) ? (mipi to usb / mipi to hdmi etc…)
  4. Another question about Framesync, if I get my system clock from the deserilazier, if I understand correctly my serializer work at  "Synchronous Mode" right ?
  5. Do TI have information about "mipi virtual ports" ? (how to separate data after the deserilazier)

Best Regards. 

  • Hello,

    1. You can find information on the FrameSync feature in section 7.3.5 of the datasheet. I've also linked an app note that includes a little bit more detail on the feature here.

    2. The number of mipi lanes necessary is dependent on the data throughput you are sending. For example, if you are using the 953 serializer, 832 Mbps can be supported on each lane. The number of lanes required must be so that the total throughput divided by the number of lanes is less than 832. When it comes to aggregation of the deserializer the formula can be a bit more complicated. Please refer to the precision lab training video here for more details. You can calculate the total throughput using:

    Video Throughput = Hres x Vres x Frame Rate x Bits per Pixel x Overhead(assume 25% if unknown) 

    3. Converters such as mipi to usb do exist. What are you trying to test? The deserializer will output the data in the same format that the camera inputs to the serializer so no additional connections should be needed between the deserializer and the display.

    4. Yes, synchronous mode is when the reference clock is extracted from the back channel (deserializer to serializer). All the devices would work off of this common clock.

    5. Yes, there is more information on virtual channels in the datasheets of multiport deserializers. For example see section 7.7.17 of the 960 datasheet.


    Regards,

    Darrah