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SN65LVDS100: Multiple Single-Ended CMOS to LVDS Translators

Yves Theroux
Prodigy 110 points
Part Number: SN65LVDS100
Other Parts Discussed in Thread: DS90LV047A, , SN65LVDS31, DS90LV031A

Hi

we have a bus of 10 signals that we have to translate from CMOS_1V8 to LVDS.

we understand that we need to bias the "-" input to 0.9V by using resistor network (resistor value: 1V8 / 600uA  = 3K)

because we have up to 10 buffers, we would like to eliminate some of these resistor networks.

Using 1 network for a group of 4 devices for example.

In some situation, the buffer will not be powered and the 1V8 on resistor network will be present

if we have 10 resistor networks, the total current @ 1V8 will be around  (1.8 - 0.3) / 3000 * 10 = 5ma  + the leakage current in the input pins

we can reduce it by reducing the QTY of network

any recommendation about this proposed architecture ?

We assume that the leakage current in the input pin will not be so high at <0.9V, any estimation?

thanks

Yves

  • 0
    TI__Guru**** 176651 points

    Yves

    Would DS90LV047A 3-V LVDS Quad CMOS Differential Line Driver fit this particular application, https://www.ti.com/lit/ds/snls044d/snls044d.pdf? This is a quad CMOS to LVDS part so you would need two DS90LV047A.

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Prodigy 110 points

    yes it will make thing easier

    but we were looking to automotive grade devices

    and also with previous experience under radiation environment

    for now, we will stay with the SN65LVDS100 device

    thanks

    Yves

  • 0 in reply to Yves Theroux
    TI__Guru**** 176651 points

    Yves

    Are you thinking driving LVDS like this?

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Prodigy 110 points

    yes exactly and maybe up to 4 buffer on the same VREF (VDD/2)

    another question, in the past we were using the SN65LVDS31 and there was an issue

    when the 4 output were toggling simultaneously

    DS90LV031A or DS90LV047A, do they have similar behavior or they are running as spec ?

    thanks

  • 0 in reply to Yves Theroux
    TI__Guru**** 176651 points

    Hi,

    Functionally the approach will work. My concern with this approach is that the CMOS is driving into a high impedance LVDS positive input which is an unterminated input, this will result in reflection or noise depends on how clean the signal is. There are two potential issues associated with this noise, 

    1. The noise could couple onto the negative input through the internal ESD structure and propagate to other SN65LVDS100 through the resistor divide network

    2. Noise could be above 30mV which will be picked up by the SN65LVDS100 and drive the output high which is not what we want.

    What is the particular issue you had with DS90LV031A? Can you share more detail? 

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Prodigy 110 points

    Hi David   

    I agree with you that noise could be an issue

    We got issue with the SN65LVDS31, when the 4 output were switching simultaneously.  (Output Voltage not valid)

    I have another question about the SN65LVDS100 device. 

    Can you provide us with the Ojc and Ojb  of the available packages ?

    in the datasheet it is written: Low-Power Alternative for the MC100EP16

    can we use the thermal information from the MC100EP16 datasheet ?

    we mainly need the TSSOP package information(DGK  (S-PDSO-G8)

    Thanks

  • 0 in reply to Yves Theroux
    Prodigy 110 points

    and we will also need the max junction temperature...

    thanks

  • 0 in reply to Yves Theroux
    TI__Guru**** 176651 points

    Hi,

    For the DGK package

    Result- Theta JA-High K (standard datasheet value) 165.5
    Result-Theta JC, top (standard datasheet value) 62.3
    Result-Theta JB (standard datasheet value) 85.9
    Result- Psi JT (standard datasheet value) 7
    Result- Psi JB (standard datasheet value) 84.4
    Result-Theta JC, bottom (standard datasheet value) n/a

    For the D package

    Result- Theta JA-High K (standard datasheet value) 111.1
    Result-Theta JC, top (standard datasheet value) 55.6
    Result-Theta JB (standard datasheet value) 51.8
    Result- Psi JT (standard datasheet value) 9.7
    Result- Psi JB (standard datasheet value) 51.2
    Result-Theta JC, bottom (standard datasheet value) n/a

    The abs max junction temp is 150C.

    Thanks

    David