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DP83640: Schematic review

Part Number: DP83640
Other Parts Discussed in Thread: AM5728,

Hi,

We are in the development stage of AM5728 based Bay Control Unit, for that we have to use DP83640 IEEE 1588 PTP ethernet PHY transceiver.

We have to configure DP83640 in the Master-Slave Mode(with Optical/RJ45 mode) .Now we designed a schematic by referring DP83640T-EVK design files obtained from below link  https://www.ti.com/tool/DP83640T-EVK

Here we are attaching the schematic diagram of our DP83640 Master-Slave Mode.

Please help review the schematic diagram  

dp83640_TI.pdf

  • Hi Manju,

    Schematic review take a 5 working day turnaround at maximum. Please expect a response EoD 10/11.

    Sincerely,

    Gerome

  • Hi Manju,

    Please find my feedback below:

    - AVDD3V3 decoupling caps do not follow recommendation of (10, 100nF) || (1, 10uF)
    - VDDIO decoupling caps do not follow recommendation of (10, 100nF) || (1, 10uF)
    - Please ensure crystal has recommended ESR
    - Schematic indicates the intent to use RMII mode for both PHYs, but no strapping resistors are shown to PU RX_DV (39) for RMII mode, please ensure PU resistors included on (39) of both PHYs
    - 1Meg || 4700 pF are recommended to isolate digital ground from MDI connector ground, e.g. (EARTH -> (1Mohm || 4700pF) -> GND)
    - SFP used, no datasheet recommendation on how to configure this properly - please validate

    Sincerely,

    Gerome

  • Hi Gerome,

    Thank you for your support.

    I have modified the schematic based on your suggestions. Updated section of schematic is shown below, also attaching the modified schematic

    - AVDD3V3 decoupling caps do not follow recommendation of (10, 100nF) || (1, 10uF)
    - VDDIO decoupling caps do not follow recommendation of (10, 100nF) || (1, 10uF)

    - Schematic indicates the intent to use RMII mode for both PHYs, but no strapping resistors are shown to PU RX_DV (39) for RMII mode, please ensure PU resistors included on (39) of both PHYs

    - 1Meg || 4700 pF are recommended to isolate digital ground from MDI connector ground, e.g. (EARTH -> (1Mohm || 4700pF) -> GND)

    dp83640_TI_2.pdf

  • Hi Manju,

    Allow me to get back to you tomorrow regarding this.

    Sincerely,

    Gerome

  • Hi Manju,

    The strapping and ground isolation looks great. I was able to uncover some guidance for decoupling capacitors. If possible, please try and update your decoupling network accordingly. Once this is implemented, this all looks okay from our side.

    Sincerely,

    Gerome

  • Hi Gerome,

    Thank you for your support. I have modified the schematic as per your suggestions. I am attaching the modified schematic here.

    dp83640_TI_3.pdf