• State TI Thinks Resolved
  • Locked Locked
  • Replies 30 replies
  • Answers 1 answer
  • Subscribers 35 subscribers
  • Views 961 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90UB953-Q1: bist error

YEPENG ZHANG
Prodigy 85 points
Part Number: DS90UB953-Q1

Our ECU(953) sends 1280*3840*30Hz YUV422 image data to another ECU(960)

So this use case is DS90UB953 , 960 couple.

We found one single issue in product car, it lead error report on 960 side (0x4d bit1, it may lead by bad packet , and stop display).

As we investigated, on 953 side,  we read the register 0x52, 0x54,0x61 when errors occurred 

0x52 changes from 0x67 to 0x6f

0x54 changes from 0x0 to 0xd8

0x61 is always 0x1e

And we did some ABA tests , we found this error followed our single ECU. 

Besides,  we did some tests on this single ECU,

1. to connect with debug ECU(960 without diagnostic) ,which can display camera image,  we can not observe abnormal 

2. to connect with 954 EVM, link margin result is good 

We need TI to analysis this issue , and to confirm whether this BIST error is unacceptable, how?

  • 0
    TI__Mastermind 26740 points

    Hello,

    Thank you for your question. How frequently is the error reported (every time or sporadically)? Are you seeing the display stop when this error occurs? Are you clearing the error registers before enabling BIST mode?

    Regards,

    Darrah

  • 0 in reply to Darrah Merillat
    Prodigy 85 points

    Hi, sporadically but veru frequently, it can be reproduced every driving cycle.

    I am not sure image lost or not, but display(30Hz) continued.

    I don't clear error registers on 953, and I don't do diagnosic on 953.  As I described, no bist error counter after 953 before error occurred.

  • 0 in reply to YEPENG ZHANG
    TI__Mastermind 26740 points

    Just to confirm, the 960 is losing pass status frequently and is indicated by register 0x4D[1] being set to 0. When this occurs the 953 has BIST errors logged in register 0x54, but BIST mode was never enabled. Is this correct?

    Are these the only errors being seen on both the 953 and partner 960? The BIST and CRC error registers are not automatically cleared on read like the other error registers. Can you clear the error counters after power up using register 0x49? This will ensure that any errors logged are from the device operation and not initialization. If that does not change anything can you send a register dump of both devices?

  • 0 in reply to Darrah Merillat
    Prodigy 85 points

    Yes, 960 partner said they never enabled BIST mode but 953 report bist error. I never mentioned it in ticket, did TI have some experience?

  • 0 in reply to YEPENG ZHANG
    TI__Mastermind 26740 points

    If BIST errors are being seen when BIST mode was never enabled then it is possible those errors were incorrectly logged during the device start up process or after a reset event. This could also be caused from not waiting 2 ms to send I2C commands after PDB goes high. As long as there are no other errors or indications that something is not working in the system, the BIST errors do not present a problem. You can clear the error counters using register 0x49.

  • 0 in reply to Darrah Merillat
    Prodigy 85 points

    Hi, 

    I retry to reproduce on my test bench (960 test board) , but no bist errors or port_pass errors occurs (sampling in 20Hz), no matter bist enabled or not (check bist enable with 0xd0 of 960).  So I can not dump log for you, I need to wait for joint debug with other company.

    After PDB goes high,our driver will wait for 5ms to send I2C communication.

    What I am confused about your suggestion, why I need to clear all the errors if there is no error. Last time I investigated this issue in product car, I can see bist error counter changed from 0 to 0xd8,  not rasied during 953 initialization. 

    Could you share the detailed information for us about bist error TI collected, is it familiar with ours?

    And is there any document about "clearing error counter after power up" , usually this operation is not common and will be advised in errata sheet or something?

  • 0 in reply to YEPENG ZHANG
    TI__Mastermind 26740 points

    You do not have to clear the errors. That was only a suggestion so that they would not remain logged in the register, but if you do not mind having them there it is not necessary to clear the errors. If BIST mode is not enabled then BIST errors being logged accidently due to initialization or a reset condition is the cause. BIST errors can not occur if BIST mode is not enabled.

    Are you seeing any other errors in the registers or artifacts on the display? Since the error can't be reproduced this also implies that the errors were likely logged accidently. BIST mode is used to validate the link between the deserializer and the serializer, when you do enable BIST mode do you see any errors or indication that the link is not good?

  • 0
    Prodigy 85 points

    joint debug with 960 side, confirmed that, bist mode is not enabled (checked by 0xd0 and 0xb3(bit1)) , but 953 will report bist error

    Both 960 and 953 side will not validate bist error, so this bist issue is provided to TI to see if 953 chip is good or not.

    attached both 953(953_1 bist error counter is 0xff, which should be link lost but actually not) and 960 registers

    We found one error reported in 960 side, which is 0x4d (0x91). When this error(PORT_PASS) happens, 960 side will stop displaying images.
    We read 960 register 0x4d constantly with no delay. And usually, PORT_PASS assert once in 10 minutes.

    So:

    1. Please check the register, and tell us why bist error logged during runtime and no bist mode enabled ? And this issue only happened in this single board.
    2. ‘PORT_PASS assert once in 10 minutes’,is this phenomenon reasonable?
  • 0 in reply to YEPENG ZHANG
    TI__Mastermind 26740 points

    Is your system only a single 953 and 960? Register 0x4d is a port specific register and a value of 0x91 indicates it is currently reading from port 2. Do you have the 953 connected to port 2 of the 960? The port_pass register is not a traditional error register. Pass refers to valid data being available at the port and this register is the indication that pass status has been asserted. Pass will be asserted once the programmed number of valid video frames or line lengths occur, which will be dependent on your system and camera. 

    Are you saying that you are now seeing a black screen? Does the display recover or do you have to reset the entire system? Are you losing lock? 

  • 0
    Expert 1785 points

    Fullscreen 0878.txt Download 
    rd: addr 0x0 data 0x60 [ok]
rd: addr 0x1 data 0x0 [ok]
rd: addr 0x2 data 0x1e [ok]
rd: addr 0x3 data 0x40 [ok]
rd: addr 0x4 data 0xd0 [ok]
rd: addr 0x5 data 0x1 [ok]
rd: addr 0x6 data 0x0 [ok]
rd: addr 0x7 data 0xfe [ok]
rd: addr 0x8 data 0x1c [ok]
rd: addr 0x9 data 0x10 [ok]
rd: addr 0xa data 0x7a [ok]
rd: addr 0xb data 0x7a [ok]
rd: addr 0xc data 0xf [ok]
rd: addr 0xd data 0x9 [ok]
rd: addr 0xe data 0x4 [ok]
rd: addr 0xf data 0xff [ok]
rd: addr 0x10 data 0x81 [ok]
rd: addr 0x11 data 0x85 [ok]
rd: addr 0x12 data 0x89 [ok]
rd: addr 0x13 data 0x8d [ok]
rd: addr 0x14 data 0x0 [ok]
rd: addr 0x15 data 0x0 [ok]
rd: addr 0x16 data 0x0 [ok]
rd: addr 0x17 data 0x0 [ok]
rd: addr 0x18 data 0x0 [ok]
rd: addr 0x19 data 0x0 [ok]
rd: addr 0x1a data 0x0 [ok]
rd: addr 0x1b data 0x0 [ok]
rd: addr 0x1c data 0x0 [ok]
rd: addr 0x1d data 0x0 [ok]
rd: addr 0x1e data 0x4 [ok]
rd: addr 0x1f data 0x4 [ok]
rd: addr 0x20 data 0x8 [ok]
rd: addr 0x21 data 0x3 [ok]
rd: addr 0x22 data 0x0 [ok]
rd: addr 0x23 data 0x8f [ok]
rd: addr 0x24 data 0x0 [ok]
rd: addr 0x25 data 0x0 [ok]
rd: addr 0x26 data 0x0 [ok]
rd: addr 0x27 data 0x0 [ok]
rd: addr 0x28 data 0x0 [ok]
rd: addr 0x29 data 0x0 [ok]
rd: addr 0x2a data 0x0 [ok]
rd: addr 0x2b data 0x0 [ok]
rd: addr 0x2c data 0x0 [ok]
rd: addr 0x2d data 0x0 [ok]
rd: addr 0x2e data 0x0 [ok]
rd: addr 0x2f data 0x0 [ok]
rd: addr 0x30 data 0x0 [ok]
rd: addr 0x31 data 0x0 [ok]
rd: addr 0x32 data 0x1 [ok]
rd: addr 0x33 data 0x3 [ok]
rd: addr 0x34 data 0x0 [ok]
rd: addr 0x35 data 0x1 [ok]
rd: addr 0x36 data 0x0 [ok]
rd: addr 0x37 data 0x0 [ok]
rd: addr 0x38 data 0x0 [ok]
rd: addr 0x39 data 0x0 [ok]
rd: addr 0x3a data 0x0 [ok]
rd: addr 0x3b data 0x0 [ok]
rd: addr 0x3c data 0x0 [ok]
rd: addr 0x3d data 0x0 [ok]
rd: addr 0x3e data 0x0 [ok]
rd: addr 0x3f data 0x0 [ok]
rd: addr 0x40 data 0x0 [ok]
rd: addr 0x41 data 0xa9 [ok]
rd: addr 0x42 data 0x71 [ok]
rd: addr 0x43 data 0x1 [ok]
rd: addr 0x44 data 0x0 [ok]
rd: addr 0x45 data 0x0 [ok]
rd: addr 0x46 data 0x20 [ok]
rd: addr 0x47 data 0x0 [ok]
rd: addr 0x48 data 0x0 [ok]
rd: addr 0x49 data 0x0 [ok]
rd: addr 0x4a data 0x0 [ok]
rd: addr 0x4b data 0x12 [ok]
rd: addr 0x4c data 0x24 [ok]
rd: addr 0x4d data 0x83 [ok]
rd: addr 0x4e data 0x4 [ok]
rd: addr 0x4f data 0x62 [ok]
rd: addr 0x50 data 0x36 [ok]
rd: addr 0x51 data 0x0 [ok]
rd: addr 0x52 data 0x0 [ok]
rd: addr 0x53 data 0x4 [ok]
rd: addr 0x54 data 0x0 [ok]
rd: addr 0x55 data 0x0 [ok]
rd: addr 0x56 data 0x0 [ok]
rd: addr 0x57 data 0x0 [ok]
rd: addr 0x58 data 0x5e [ok]
rd: addr 0x59 data 0x0 [ok]
rd: addr 0x5a data 0x0 [ok]
rd: addr 0x5b data 0x30 [ok]
rd: addr 0x5c data 0x1c [ok]
rd: addr 0x5d data 0xc0 [ok]
rd: addr 0x5e data 0x0 [ok]
rd: addr 0x5f data 0x0 [ok]
rd: addr 0x60 data 0x0 [ok]
rd: addr 0x61 data 0x0 [ok]
rd: addr 0x62 data 0x0 [ok]
rd: addr 0x63 data 0x0 [ok]
rd: addr 0x64 data 0x0 [ok]
rd: addr 0x65 data 0x52 [ok]
rd: addr 0x66 data 0x0 [ok]
rd: addr 0x67 data 0x0 [ok]
rd: addr 0x68 data 0x0 [ok]
rd: addr 0x69 data 0x0 [ok]
rd: addr 0x6a data 0x0 [ok]
rd: addr 0x6b data 0x0 [ok]
rd: addr 0x6c data 0x0 [ok]
rd: addr 0x6d data 0x7c [ok]
rd: addr 0x6e data 0x9 [ok]
rd: addr 0x6f data 0x8 [ok]
rd: addr 0x70 data 0x9e [ok]
rd: addr 0x71 data 0x9e [ok]
rd: addr 0x72 data 0xe6 [ok]
rd: addr 0x73 data 0xf [ok]
rd: addr 0x74 data 0x0 [ok]
rd: addr 0x75 data 0xa [ok]
rd: addr 0x76 data 0x0 [ok]
rd: addr 0x77 data 0xc5 [ok]
rd: addr 0x78 data 0x0 [ok]
rd: addr 0x79 data 0x1 [ok]
rd: addr 0x7a data 0x0 [ok]
rd: addr 0x7b data 0x0 [ok]
rd: addr 0x7c data 0x80 [ok]
rd: addr 0x7d data 0xbd [ok]
rd: addr 0x7e data 0x0 [ok]
rd: addr 0x7f data 0x0 [ok]
rd: addr 0x80 data 0x0 [ok]
rd: addr 0x81 data 0x0 [ok]
rd: addr 0x82 data 0x0 [ok]
rd: addr 0x83 data 0x0 [ok]
rd: addr 0x84 data 0x0 [ok]
rd: addr 0x85 data 0x0 [ok]
rd: addr 0x86 data 0x0 [ok]
rd: addr 0x87 data 0x0 [ok]
rd: addr 0x88 data 0x0 [ok]
rd: addr 0x89 data 0x0 [ok]
rd: addr 0x8a data 0x0 [ok]
rd: addr 0x8b data 0x0 [ok]
rd: addr 0x8c data 0x0 [ok]
rd: addr 0x8d data 0x0 [ok]
rd: addr 0x8e data 0x0 [ok]
rd: addr 0x8f data 0x0 [ok]
rd: addr 0x90 data 0x0 [ok]
rd: addr 0x91 data 0x1 [ok]
rd: addr 0x92 data 0x0 [ok]
rd: addr 0x93 data 0x0 [ok]
rd: addr 0x94 data 0x14 [ok]
rd: addr 0x95 data 0x5 [ok]
rd: addr 0x96 data 0x0 [ok]
rd: addr 0x97 data 0x0 [ok]
rd: addr 0x98 data 0x0 [ok]
rd: addr 0x99 data 0x0 [ok]
rd: addr 0x9a data 0x0 [ok]
rd: addr 0x9b data 0x0 [ok]
rd: addr 0x9c data 0x0 [ok]
rd: addr 0x9d data 0x0 [ok]
rd: addr 0x9e data 0x0 [ok]
rd: addr 0x9f data 0x0 [ok]
rd: addr 0xa0 data 0x0 [ok]
rd: addr 0xa1 data 0x0 [ok]
rd: addr 0xa2 data 0x0 [ok]
rd: addr 0xa3 data 0x0 [ok]
rd: addr 0xa4 data 0x0 [ok]
rd: addr 0xa5 data 0x1c [ok]
rd: addr 0xa6 data 0x0 [ok]
rd: addr 0xa7 data 0x0 [ok]
rd: addr 0xa8 data 0x0 [ok]
rd: addr 0xa9 data 0x0 [ok]
rd: addr 0xaa data 0x0 [ok]
rd: addr 0xab data 0x0 [ok]
rd: addr 0xac data 0x0 [ok]
rd: addr 0xad data 0x0 [ok]
rd: addr 0xae data 0x0 [ok]
rd: addr 0xaf data 0x0 [ok]
rd: addr 0xb0 data 0x1c [ok]
rd: addr 0xb1 data 0x13 [ok]
rd: addr 0xb2 data 0x1f [ok]
rd: addr 0xb3 data 0x8 [ok]
rd: addr 0xb4 data 0x25 [ok]
rd: addr 0xb5 data 0x0 [ok]
rd: addr 0xb6 data 0x18 [ok]
rd: addr 0xb7 data 0x0 [ok]
rd: addr 0xb8 data 0x88 [ok]
rd: addr 0xb9 data 0x33 [ok]
rd: addr 0xba data 0x83 [ok]
rd: addr 0xbb data 0x74 [ok]
rd: addr 0xbc data 0x80 [ok]
rd: addr 0xbd data 0x0 [ok]
rd: addr 0xbe data 0x0 [ok]
rd: addr 0xbf data 0x0 [ok]
rd: addr 0xc0 data 0x0 [ok]
rd: addr 0xc1 data 0x0 [ok]
rd: addr 0xc2 data 0x0 [ok]
rd: addr 0xc3 data 0x0 [ok]
rd: addr 0xc4 data 0x0 [ok]
rd: addr 0xc5 data 0x0 [ok]
rd: addr 0xc6 data 0x0 [ok]
rd: addr 0xc7 data 0x0 [ok]
rd: addr 0xc8 data 0x0 [ok]
rd: addr 0xc9 data 0x0 [ok]
rd: addr 0xca data 0x0 [ok]
rd: addr 0xcb data 0x0 [ok]
rd: addr 0xcc data 0x0 [ok]
rd: addr 0xcd data 0x0 [ok]
rd: addr 0xce data 0x0 [ok]
rd: addr 0xcf data 0x0 [ok]
rd: addr 0xd0 data 0x0 [ok]
rd: addr 0xd1 data 0x43 [ok]
rd: addr 0xd2 data 0x94 [ok]
rd: addr 0xd3 data 0x4 [ok]
rd: addr 0xd4 data 0x60 [ok]
rd: addr 0xd5 data 0xf2 [ok]
rd: addr 0xd6 data 0x0 [ok]
rd: addr 0xd7 data 0x2 [ok]
rd: addr 0xd8 data 0x0 [ok]
rd: addr 0xd9 data 0x13 [ok]
rd: addr 0xda data 0x0 [ok]
rd: addr 0xdb data 0x0 [ok]
rd: addr 0xdc data 0x0 [ok]
rd: addr 0xdd data 0x0 [ok]
rd: addr 0xde data 0x0 [ok]
rd: addr 0xdf data 0x0 [ok]
rd: addr 0xe0 data 0x0 [ok]
rd: addr 0xe1 data 0x0 [ok]
rd: addr 0xe2 data 0x0 [ok]
rd: addr 0xe3 data 0x0 [ok]
rd: addr 0xe4 data 0x0 [ok]
rd: addr 0xe5 data 0x0 [ok]
rd: addr 0xe6 data 0x0 [ok]
rd: addr 0xe7 data 0x0 [ok]
rd: addr 0xe8 data 0x0 [ok]
rd: addr 0xe9 data 0x0 [ok]
rd: addr 0xea data 0x0 [ok]
rd: addr 0xeb data 0x0 [ok]
rd: addr 0xec data 0x0 [ok]
rd: addr 0xed data 0x0 [ok]
rd: addr 0xee data 0x0 [ok]
rd: addr 0xef data 0x0 [ok]
rd: addr 0xf0 data 0x5f [ok]
rd: addr 0xf1 data 0x55 [ok]
rd: addr 0xf2 data 0x42 [ok]
rd: addr 0xf3 data 0x39 [ok]
rd: addr 0xf4 data 0x36 [ok]
rd: addr 0xf5 data 0x30 [ok]
rd: addr 0xf6 data 0x0 [ok]
rd: addr 0xf7 data 0x0 [ok]
rd: addr 0xf8 data 0x0 [ok]
rd: addr 0xf9 data 0x0 [ok]
rd: addr 0xfa data 0x0 [ok]
rd: addr 0xfb data 0x0 [ok]
rd: addr 0xfc data 0x0 [ok]
rd: addr 0xfd data 0x0 [ok]
rd: addr 0xfe data 0x0 [ok]
rd: addr 0xff data 0x0 [ok]
    Fullscreen 953_1.txt Download 
    DATA[0x0]: 
0xff30 
DATA[0x1]: 
0xff00 
DATA[0x2]: 
0xff33 
DATA[0x3]: 
0xff5b 
DATA[0x4]: 
0xff00 
DATA[0x5]: 
0xff1b 
DATA[0x6]: 
0xff41 
DATA[0x7]: 
0xff28 
DATA[0x8]: 
0xfffe 
DATA[0x9]: 
0xff1e 
DATA[0xa]: 
0xff10 
DATA[0xb]: 
0xff7f 
DATA[0xc]: 
0xff7f 
DATA[0xd]: 
0xfff0 
DATA[0xe]: 
0xff0f 
DATA[0xf]: 
0xff00 
DATA[0x10]: 
0xff00 
DATA[0x11]: 
0xff00 
DATA[0x12]: 
0xff00 
DATA[0x13]: 
0xff00 
DATA[0x14]: 
0xff00 
DATA[0x15]: 
0xff20 
DATA[0x16]: 
0xff18 
DATA[0x17]: 
0xff3c 
DATA[0x18]: 
0xff80 
DATA[0x19]: 
0xff62 
DATA[0x1a]: 
0xff62 
DATA[0x1b]: 
0xff62 
DATA[0x1c]: 
0xff00 
DATA[0x1d]: 
0xff00 
DATA[0x1e]: 
0xff00 
DATA[0x1f]: 
0xff00 
DATA[0x20]: 
0xff00 
DATA[0x21]: 
0xff00 
DATA[0x22]: 
0xff00 
DATA[0x23]: 
0xff00 
DATA[0x24]: 
0xff00 
DATA[0x25]: 
0xff02 
DATA[0x26]: 
0xff00 
DATA[0x27]: 
0xff00 
DATA[0x28]: 
0xff67 
DATA[0x29]: 
0xff33 
DATA[0x2a]: 
0xff01 
DATA[0x2b]: 
0xff00 
DATA[0x2c]: 
0xff00 
DATA[0x2d]: 
0xff00 
DATA[0x2e]: 
0xff00 
DATA[0x2f]: 
0xff00 
DATA[0x30]: 
0xff00 
DATA[0x31]: 
0xff20 
DATA[0x32]: 
0xff09 
DATA[0x33]: 
0xff04 
DATA[0x34]: 
0xff00 
DATA[0x35]: 
0xff12 
DATA[0x36]: 
0xff00 
DATA[0x37]: 
0xff60 
DATA[0x38]: 
0xff00 
DATA[0x39]: 
0xff00 
DATA[0x3a]: 
0xff00 
DATA[0x3b]: 
0xff00 
DATA[0x3c]: 
0xff00 
DATA[0x3d]: 
0xff00 
DATA[0x3e]: 
0xff00 
DATA[0x3f]: 
0xff00 
DATA[0x40]: 
0xff00 
DATA[0x41]: 
0xff00 
DATA[0x42]: 
0xff00 
DATA[0x43]: 
0xff00 
DATA[0x44]: 
0xff00 
DATA[0x45]: 
0xff00 
DATA[0x46]: 
0xff00 
DATA[0x47]: 
0xff00 
DATA[0x48]: 
0xff00 
DATA[0x49]: 
0xff00 
DATA[0x4a]: 
0xff00 
DATA[0x4b]: 
0xff00 
DATA[0x4c]: 
0xff00 
DATA[0x4d]: 
0xff00 
DATA[0x4e]: 
0xff00 
DATA[0x4f]: 
0xff00 
DATA[0x50]: 
0xff20 
DATA[0x51]: 
0xffc0 
DATA[0x52]: 
0xff4f 
DATA[0x53]: 
0xff05 
DATA[0x54]: 
0xffff 
DATA[0x55]: 
0xffff 
DATA[0x56]: 
0xffff 
DATA[0x57]: 
0xff00 
DATA[0x58]: 
0xff07 
DATA[0x59]: 
0xff07 
DATA[0x5a]: 
0xff07 
DATA[0x5b]: 
0xff00 
DATA[0x5c]: 
0xff00 
DATA[0x5d]: 
0xff00 
DATA[0x5e]: 
0xff00 
DATA[0x5f]: 
0xff00 
DATA[0x60]: 
0xff00 
DATA[0x61]: 
0xff1e 
DATA[0x62]: 
0xff00 
DATA[0x63]: 
0xff0a 
DATA[0x64]: 
0xff11 
DATA[0x65]: 
0xff8a 
DATA[0x66]: 
0xff00 
DATA[0x67]: 
0xff64 
DATA[0x68]: 
0xff00 
DATA[0x69]: 
0xff00 
DATA[0x6a]: 
0xff00 
DATA[0x6b]: 
0xff00 
DATA[0x6c]: 
0xff00 
DATA[0x6d]: 
0xff00 
DATA[0x6e]: 
0xff00 
DATA[0x6f]: 
0xff00 
DATA[0x70]: 
0xff00 
DATA[0x71]: 
0xff00 
DATA[0x72]: 
0xff25 
DATA[0x73]: 
0xff00 
DATA[0x74]: 
0xff00 
DATA[0x75]: 
0xff00 
DATA[0x76]: 
0xff00 
DATA[0x77]: 
0xff00 
DATA[0x78]: 
0xff00 
DATA[0x79]: 
0xff00 
DATA[0x7a]: 
0xffe4 
DATA[0x7b]: 
0xff00 
DATA[0x7c]: 
0xff00 
DATA[0x7d]: 
0xff00 
DATA[0x7e]: 
0xff00 
DATA[0x7f]: 
0xff00 
DATA[0x80]: 
0xff00 
DATA[0x81]: 
0xff00 
DATA[0x82]: 
0xff00 
DATA[0x83]: 
0xff00 
DATA[0x84]: 
0xff00 
DATA[0x85]: 
0xff00 
DATA[0x86]: 
0xff90 
DATA[0x87]: 
0xff00 
DATA[0x88]: 
0xff00 
DATA[0x89]: 
0xff00 
DATA[0x8a]: 
0xff00 
DATA[0x8b]: 
0xff00 
DATA[0x8c]: 
0xff08 
DATA[0x8d]: 
0xff00 
DATA[0x8e]: 
0xff00 
DATA[0x8f]: 
0xff00 
DATA[0x90]: 
0xff32 
DATA[0x91]: 
0xffe3 
DATA[0x92]: 
0xff64 
DATA[0x93]: 
0xff01 
DATA[0x94]: 
0xff00 
DATA[0x95]: 
0xff00 
DATA[0x96]: 
0xff00 
DATA[0x97]: 
0xff00 
DATA[0x98]: 
0xff00 
DATA[0x99]: 
0xff00 
DATA[0x9a]: 
0xff24 
DATA[0x9b]: 
0xff00 
DATA[0x9c]: 
0xff01 
DATA[0x9d]: 
0xff03 
DATA[0x9e]: 
0xff00 
DATA[0x9f]: 
0xff10 
DATA[0xa0]: 
0xff00 
DATA[0xa1]: 
0xff11 
DATA[0xa2]: 
0xff0f 
DATA[0xa3]: 
0xff0f 
DATA[0xa4]: 
0xff10 
DATA[0xa5]: 
0xff10 
DATA[0xa6]: 
0xff42 
DATA[0xa7]: 
0xff10 
DATA[0xa8]: 
0xff10 
DATA[0xa9]: 
0xff10 
DATA[0xaa]: 
0xff03 
DATA[0xab]: 
0xff01 
DATA[0xac]: 
0xff00 
DATA[0xad]: 
0xff00 
DATA[0xae]: 
0xff00 
DATA[0xaf]: 
0xff00 
DATA[0xb0]: 
0xff04 
DATA[0xb1]: 
0xff4a 
DATA[0xb2]: 
0xff3f 
DATA[0xb3]: 
0xff00 
DATA[0xb4]: 
0xff00 
DATA[0xb5]: 
0xff00 
DATA[0xb6]: 
0xff00 
DATA[0xb7]: 
0xff00 
DATA[0xb8]: 
0xff00 
DATA[0xb9]: 
0xff00 
DATA[0xba]: 
0xff00 
DATA[0xbb]: 
0xff00 
DATA[0xbc]: 
0xff00 
DATA[0xbd]: 
0xff00 
DATA[0xbe]: 
0xff00 
DATA[0xbf]: 
0xff00 
DATA[0xc0]: 
0xff00 
DATA[0xc1]: 
0xff00 
DATA[0xc2]: 
0xff00 
DATA[0xc3]: 
0xff00 
DATA[0xc4]: 
0xff00 
DATA[0xc5]: 
0xff00 
DATA[0xc6]: 
0xff00 
DATA[0xc7]: 
0xff00 
DATA[0xc8]: 
0xff00 
DATA[0xc9]: 
0xff00 
DATA[0xca]: 
0xff00 
DATA[0xcb]: 
0xff00 
DATA[0xcc]: 
0xff00 
DATA[0xcd]: 
0xff00 
DATA[0xce]: 
0xff00 
DATA[0xcf]: 
0xff00 
DATA[0xd0]: 
0xff00 
DATA[0xd1]: 
0xff00 
DATA[0xd2]: 
0xff00 
DATA[0xd3]: 
0xff00 
DATA[0xd4]: 
0xff00 
DATA[0xd5]: 
0xff00 
DATA[0xd6]: 
0xff00 
DATA[0xd7]: 
0xff00 
DATA[0xd8]: 
0xff00 
DATA[0xd9]: 
0xff00 
DATA[0xda]: 
0xff00 
DATA[0xdb]: 
0xff00 
DATA[0xdc]: 
0xff00 
DATA[0xdd]: 
0xff00 
DATA[0xde]: 
0xff00 
DATA[0xdf]: 
0xff00 
DATA[0xe0]: 
0xff00 
DATA[0xe1]: 
0xff00 
DATA[0xe2]: 
0xff00 
DATA[0xe3]: 
0xff00 
DATA[0xe4]: 
0xff00 
DATA[0xe5]: 
0xff00 
DATA[0xe6]: 
0xff00 
DATA[0xe7]: 
0xff00 
DATA[0xe8]: 
0xff00 
DATA[0xe9]: 
0xff00 
DATA[0xea]: 
0xff00 
DATA[0xeb]: 
0xff00 
DATA[0xec]: 
0xff00 
DATA[0xed]: 
0xff00 
DATA[0xee]: 
0xff00 
DATA[0xef]: 
0xff00 
DATA[0xf0]: 
0xff5f 
DATA[0xf1]: 
0xff55 
DATA[0xf2]: 
0xff42 
DATA[0xf3]: 
0xff39 
DATA[0xf4]: 
0xff35 
DATA[0xf5]: 
0xff33 
DATA[0xf6]: 
0xff00 
DATA[0xf7]: 
0xff00 
DATA[0xf8]: 
0xff00 
DATA[0xf9]: 
0xff00 
DATA[0xfa]: 
0xff00 
DATA[0xfb]: 
0xff00 
DATA[0xfc]: 
0xff00 
DATA[0xfd]: 
0xff00 
DATA[0xfe]: 
0xff00
    Fullscreen 953_2.txt Download 
    DATA[0x0]: 
0xff30 
DATA[0x1]: 
0xff00 
DATA[0x2]: 
0xff33 
DATA[0x3]: 
0xff5b 
DATA[0x4]: 
0xff00 
DATA[0x5]: 
0xff1b 
DATA[0x6]: 
0xff41 
DATA[0x7]: 
0xff28 
DATA[0x8]: 
0xfffe 
DATA[0x9]: 
0xff1e 
DATA[0xa]: 
0xff10 
DATA[0xb]: 
0xff7f 
DATA[0xc]: 
0xff7f 
DATA[0xd]: 
0xfff0 
DATA[0xe]: 
0xff0f 
DATA[0xf]: 
0xff00 
DATA[0x10]: 
0xff00 
DATA[0x11]: 
0xff00 
DATA[0x12]: 
0xff00 
DATA[0x13]: 
0xff00 
DATA[0x14]: 
0xff00 
DATA[0x15]: 
0xff20 
DATA[0x16]: 
0xff18 
DATA[0x17]: 
0xff3c 
DATA[0x18]: 
0xff80 
DATA[0x19]: 
0xff62 
DATA[0x1a]: 
0xff62 
DATA[0x1b]: 
0xff62 
DATA[0x1c]: 
0xff00 
DATA[0x1d]: 
0xff00 
DATA[0x1e]: 
0xff00 
DATA[0x1f]: 
0xff00 
DATA[0x20]: 
0xff00 
DATA[0x21]: 
0xff00 
DATA[0x22]: 
0xff00 
DATA[0x23]: 
0xff00 
DATA[0x24]: 
0xff00 
DATA[0x25]: 
0xff02 
DATA[0x26]: 
0xff00 
DATA[0x27]: 
0xff00 
DATA[0x28]: 
0xff67 
DATA[0x29]: 
0xff33 
DATA[0x2a]: 
0xff01 
DATA[0x2b]: 
0xff00 
DATA[0x2c]: 
0xff00 
DATA[0x2d]: 
0xff00 
DATA[0x2e]: 
0xff00 
DATA[0x2f]: 
0xff00 
DATA[0x30]: 
0xff00 
DATA[0x31]: 
0xff20 
DATA[0x32]: 
0xff09 
DATA[0x33]: 
0xff04 
DATA[0x34]: 
0xff00 
DATA[0x35]: 
0xff12 
DATA[0x36]: 
0xff00 
DATA[0x37]: 
0xff60 
DATA[0x38]: 
0xff00 
DATA[0x39]: 
0xff00 
DATA[0x3a]: 
0xff00 
DATA[0x3b]: 
0xff00 
DATA[0x3c]: 
0xff00 
DATA[0x3d]: 
0xff00 
DATA[0x3e]: 
0xff00 
DATA[0x3f]: 
0xff00 
DATA[0x40]: 
0xff00 
DATA[0x41]: 
0xff00 
DATA[0x42]: 
0xff00 
DATA[0x43]: 
0xff00 
DATA[0x44]: 
0xff00 
DATA[0x45]: 
0xff00 
DATA[0x46]: 
0xff00 
DATA[0x47]: 
0xff00 
DATA[0x48]: 
0xff00 
DATA[0x49]: 
0xff00 
DATA[0x4a]: 
0xff00 
DATA[0x4b]: 
0xff00 
DATA[0x4c]: 
0xff00 
DATA[0x4d]: 
0xff00 
DATA[0x4e]: 
0xff00 
DATA[0x4f]: 
0xff00 
DATA[0x50]: 
0xff20 
DATA[0x51]: 
0xffc0 
DATA[0x52]: 
0xff4f 
DATA[0x53]: 
0xff05 
DATA[0x54]: 
0xff64 
DATA[0x55]: 
0xffff 
DATA[0x56]: 
0xffff 
DATA[0x57]: 
0xff00 
DATA[0x58]: 
0xff07 
DATA[0x59]: 
0xff07 
DATA[0x5a]: 
0xff07 
DATA[0x5b]: 
0xff00 
DATA[0x5c]: 
0xff00 
DATA[0x5d]: 
0xff00 
DATA[0x5e]: 
0xff00 
DATA[0x5f]: 
0xff00 
DATA[0x60]: 
0xff00 
DATA[0x61]: 
0xff1e 
DATA[0x62]: 
0xff00 
DATA[0x63]: 
0xff0a 
DATA[0x64]: 
0xff11 
DATA[0x65]: 
0xff8a 
DATA[0x66]: 
0xff00 
DATA[0x67]: 
0xff64 
DATA[0x68]: 
0xff00 
DATA[0x69]: 
0xff00 
DATA[0x6a]: 
0xff00 
DATA[0x6b]: 
0xff00 
DATA[0x6c]: 
0xff00 
DATA[0x6d]: 
0xff00 
DATA[0x6e]: 
0xff00 
DATA[0x6f]: 
0xff00 
DATA[0x70]: 
0xff00 
DATA[0x71]: 
0xff00 
DATA[0x72]: 
0xff25 
DATA[0x73]: 
0xff00 
DATA[0x74]: 
0xff00 
DATA[0x75]: 
0xff00 
DATA[0x76]: 
0xff00 
DATA[0x77]: 
0xff00 
DATA[0x78]: 
0xff00 
DATA[0x79]: 
0xff00 
DATA[0x7a]: 
0xffe4 
DATA[0x7b]: 
0xff00 
DATA[0x7c]: 
0xff00 
DATA[0x7d]: 
0xff00 
DATA[0x7e]: 
0xff00 
DATA[0x7f]: 
0xff00 
DATA[0x80]: 
0xff00 
DATA[0x81]: 
0xff00 
DATA[0x82]: 
0xff00 
DATA[0x83]: 
0xff00 
DATA[0x84]: 
0xff00 
DATA[0x85]: 
0xff00 
DATA[0x86]: 
0xff90 
DATA[0x87]: 
0xff00 
DATA[0x88]: 
0xff00 
DATA[0x89]: 
0xff00 
DATA[0x8a]: 
0xff00 
DATA[0x8b]: 
0xff00 
DATA[0x8c]: 
0xff08 
DATA[0x8d]: 
0xff00 
DATA[0x8e]: 
0xff00 
DATA[0x8f]: 
0xff00 
DATA[0x90]: 
0xff32 
DATA[0x91]: 
0xffe3 
DATA[0x92]: 
0xff64 
DATA[0x93]: 
0xff01 
DATA[0x94]: 
0xff00 
DATA[0x95]: 
0xff00 
DATA[0x96]: 
0xff00 
DATA[0x97]: 
0xff00 
DATA[0x98]: 
0xff00 
DATA[0x99]: 
0xff00 
DATA[0x9a]: 
0xff24 
DATA[0x9b]: 
0xff00 
DATA[0x9c]: 
0xff01 
DATA[0x9d]: 
0xff03 
DATA[0x9e]: 
0xff00 
DATA[0x9f]: 
0xff10 
DATA[0xa0]: 
0xff00 
DATA[0xa1]: 
0xff11 
DATA[0xa2]: 
0xff0f 
DATA[0xa3]: 
0xff0f 
DATA[0xa4]: 
0xff10 
DATA[0xa5]: 
0xff10 
DATA[0xa6]: 
0xff42 
DATA[0xa7]: 
0xff10 
DATA[0xa8]: 
0xff10 
DATA[0xa9]: 
0xff10 
DATA[0xaa]: 
0xff03 
DATA[0xab]: 
0xff01 
DATA[0xac]: 
0xff00 
DATA[0xad]: 
0xff00 
DATA[0xae]: 
0xff00 
DATA[0xaf]: 
0xff00 
DATA[0xb0]: 
0xff04 
DATA[0xb1]: 
0xff4a 
DATA[0xb2]: 
0xff3f 
DATA[0xb3]: 
0xff00 
DATA[0xb4]: 
0xff00 
DATA[0xb5]: 
0xff00 
DATA[0xb6]: 
0xff00 
DATA[0xb7]: 
0xff00 
DATA[0xb8]: 
0xff00 
DATA[0xb9]: 
0xff00 
DATA[0xba]: 
0xff00 
DATA[0xbb]: 
0xff00 
DATA[0xbc]: 
0xff00 
DATA[0xbd]: 
0xff00 
DATA[0xbe]: 
0xff00 
DATA[0xbf]: 
0xff00 
DATA[0xc0]: 
0xff00 
DATA[0xc1]: 
0xff00 
DATA[0xc2]: 
0xff00 
DATA[0xc3]: 
0xff00 
DATA[0xc4]: 
0xff00 
DATA[0xc5]: 
0xff00 
DATA[0xc6]: 
0xff00 
DATA[0xc7]: 
0xff00 
DATA[0xc8]: 
0xff00 
DATA[0xc9]: 
0xff00 
DATA[0xca]: 
0xff00 
DATA[0xcb]: 
0xff00 
DATA[0xcc]: 
0xff00 
DATA[0xcd]: 
0xff00 
DATA[0xce]: 
0xff00 
DATA[0xcf]: 
0xff00 
DATA[0xd0]: 
0xff00 
DATA[0xd1]: 
0xff00 
DATA[0xd2]: 
0xff00 
DATA[0xd3]: 
0xff00 
DATA[0xd4]: 
0xff00 
DATA[0xd5]: 
0xff00 
DATA[0xd6]: 
0xff00 
DATA[0xd7]: 
0xff00 
DATA[0xd8]: 
0xff00 
DATA[0xd9]: 
0xff00 
DATA[0xda]: 
0xff00 
DATA[0xdb]: 
0xff00 
DATA[0xdc]: 
0xff00 
DATA[0xdd]: 
0xff00 
DATA[0xde]: 
0xff00 
DATA[0xdf]: 
0xff00 
DATA[0xe0]: 
0xff00 
DATA[0xe1]: 
0xff00 
DATA[0xe2]: 
0xff00 
DATA[0xe3]: 
0xff00 
DATA[0xe4]: 
0xff00 
DATA[0xe5]: 
0xff00 
DATA[0xe6]: 
0xff00 
DATA[0xe7]: 
0xff00 
DATA[0xe8]: 
0xff00 
DATA[0xe9]: 
0xff00 
DATA[0xea]: 
0xff00 
DATA[0xeb]: 
0xff00 
DATA[0xec]: 
0xff00 
DATA[0xed]: 
0xff00 
DATA[0xee]: 
0xff00 
DATA[0xef]: 
0xff00 
DATA[0xf0]: 
0xff5f 
DATA[0xf1]: 
0xff55 
DATA[0xf2]: 
0xff42 
DATA[0xf3]: 
0xff39 
DATA[0xf4]: 
0xff35 
DATA[0xf5]: 
0xff33 
DATA[0xf6]: 
0xff00 
DATA[0xf7]: 
0xff00 
DATA[0xf8]: 
0xff00 
DATA[0xf9]: 
0xff00 
DATA[0xfa]: 
0xff00 
DATA[0xfb]: 
0xff00 
DATA[0xfc]: 
0xff00 
DATA[0xfd]: 
0xff00 
DATA[0xfe]: 
0xff00

    Hi TI Team,

    upload the register for ser-deser. 

  • 0 in reply to hutian
    TI__Mastermind 26740 points

    The register are showing the BIST CRC errors are being logged as we've been discussing, but the 960 registers show that lock and pass status are set and there are no errors on the 960. CRC errors are associated with the back channel and are normally caused by noise, cross talk, reflections, etc. Can you clarify what your system looks like and what exactly you are seeing? Is there only a single 953 and 960 connected on port 2? Are you seeing a black screen, and if you do does it auto recover? Have you tried running BIST mode to see if these errors are logged when it is enabled?

  • 0 in reply to Darrah Merillat
    TI__Expert 3280 points

    hi Darrah,

    customer joint debug with 960 side, confirmed that, bist mode is not enabled (checked by 0xd0 and 0xb3(bit1)) , but 953 will report bist error

    Both 960 and 953 side will not validate bist error, so this bist issue is provided to TI to see if 953 chip is good or not.

    attached both 953(953_1 bist error counter is 0xff, which should be link lost but actually not) and 960 registers

    We found one error reported in 960 side, which is 0x4d (0x91). When this error(PORT_PASS) happens, 960 side will stop displaying images.
    We read 960 register 0x4d constantly with no delay. And usually, PORT_PASS assert once in 10 minutes.

    So:

    1. Please check the register, and tell us why bist error logged during runtime and no bist mode enabled ? And this issue only happened in this single board.
    2. ‘PORT_PASS assert once in 10 minutes’,is this phenomenon reasonable?

    The attachment(TI asked) was dump in abnormal scenario ,if you can open it and check the 0x54 bist error counter

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/138/953_5F00_1https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/138/953_5F00_2

    Fullscreen 2021.txt Download 
    rd: addr 0x0 data 0x60 [ok]
rd: addr 0x1 data 0x0 [ok]
rd: addr 0x2 data 0x1e [ok]
rd: addr 0x3 data 0x40 [ok]
rd: addr 0x4 data 0xd0 [ok]
rd: addr 0x5 data 0x1 [ok]
rd: addr 0x6 data 0x0 [ok]
rd: addr 0x7 data 0xfe [ok]
rd: addr 0x8 data 0x1c [ok]
rd: addr 0x9 data 0x10 [ok]
rd: addr 0xa data 0x7a [ok]
rd: addr 0xb data 0x7a [ok]
rd: addr 0xc data 0xf [ok]
rd: addr 0xd data 0x9 [ok]
rd: addr 0xe data 0x4 [ok]
rd: addr 0xf data 0xff [ok]
rd: addr 0x10 data 0x81 [ok]
rd: addr 0x11 data 0x85 [ok]
rd: addr 0x12 data 0x89 [ok]
rd: addr 0x13 data 0x8d [ok]
rd: addr 0x14 data 0x0 [ok]
rd: addr 0x15 data 0x0 [ok]
rd: addr 0x16 data 0x0 [ok]
rd: addr 0x17 data 0x0 [ok]
rd: addr 0x18 data 0x0 [ok]
rd: addr 0x19 data 0x0 [ok]
rd: addr 0x1a data 0x0 [ok]
rd: addr 0x1b data 0x0 [ok]
rd: addr 0x1c data 0x0 [ok]
rd: addr 0x1d data 0x0 [ok]
rd: addr 0x1e data 0x4 [ok]
rd: addr 0x1f data 0x4 [ok]
rd: addr 0x20 data 0x8 [ok]
rd: addr 0x21 data 0x3 [ok]
rd: addr 0x22 data 0x0 [ok]
rd: addr 0x23 data 0x8f [ok]
rd: addr 0x24 data 0x0 [ok]
rd: addr 0x25 data 0x0 [ok]
rd: addr 0x26 data 0x0 [ok]
rd: addr 0x27 data 0x0 [ok]
rd: addr 0x28 data 0x0 [ok]
rd: addr 0x29 data 0x0 [ok]
rd: addr 0x2a data 0x0 [ok]
rd: addr 0x2b data 0x0 [ok]
rd: addr 0x2c data 0x0 [ok]
rd: addr 0x2d data 0x0 [ok]
rd: addr 0x2e data 0x0 [ok]
rd: addr 0x2f data 0x0 [ok]
rd: addr 0x30 data 0x0 [ok]
rd: addr 0x31 data 0x0 [ok]
rd: addr 0x32 data 0x1 [ok]
rd: addr 0x33 data 0x3 [ok]
rd: addr 0x34 data 0x0 [ok]
rd: addr 0x35 data 0x1 [ok]
rd: addr 0x36 data 0x0 [ok]
rd: addr 0x37 data 0x0 [ok]
rd: addr 0x38 data 0x0 [ok]
rd: addr 0x39 data 0x0 [ok]
rd: addr 0x3a data 0x0 [ok]
rd: addr 0x3b data 0x0 [ok]
rd: addr 0x3c data 0x0 [ok]
rd: addr 0x3d data 0x0 [ok]
rd: addr 0x3e data 0x0 [ok]
rd: addr 0x3f data 0x0 [ok]
rd: addr 0x40 data 0x0 [ok]
rd: addr 0x41 data 0xa9 [ok]
rd: addr 0x42 data 0x71 [ok]
rd: addr 0x43 data 0x1 [ok]
rd: addr 0x44 data 0x0 [ok]
rd: addr 0x45 data 0x0 [ok]
rd: addr 0x46 data 0x20 [ok]
rd: addr 0x47 data 0x0 [ok]
rd: addr 0x48 data 0x0 [ok]
rd: addr 0x49 data 0x0 [ok]
rd: addr 0x4a data 0x0 [ok]
rd: addr 0x4b data 0x12 [ok]
rd: addr 0x4c data 0x24 [ok]
rd: addr 0x4d data 0x83 [ok]
rd: addr 0x4e data 0x4 [ok]
rd: addr 0x4f data 0x62 [ok]
rd: addr 0x50 data 0x36 [ok]
rd: addr 0x51 data 0x0 [ok]
rd: addr 0x52 data 0x0 [ok]
rd: addr 0x53 data 0x4 [ok]
rd: addr 0x54 data 0x0 [ok]
rd: addr 0x55 data 0x0 [ok]
rd: addr 0x56 data 0x0 [ok]
rd: addr 0x57 data 0x0 [ok]
rd: addr 0x58 data 0x5e [ok]
rd: addr 0x59 data 0x0 [ok]
rd: addr 0x5a data 0x0 [ok]
rd: addr 0x5b data 0x30 [ok]
rd: addr 0x5c data 0x1c [ok]
rd: addr 0x5d data 0xc0 [ok]
rd: addr 0x5e data 0x0 [ok]
rd: addr 0x5f data 0x0 [ok]
rd: addr 0x60 data 0x0 [ok]
rd: addr 0x61 data 0x0 [ok]
rd: addr 0x62 data 0x0 [ok]
rd: addr 0x63 data 0x0 [ok]
rd: addr 0x64 data 0x0 [ok]
rd: addr 0x65 data 0x52 [ok]
rd: addr 0x66 data 0x0 [ok]
rd: addr 0x67 data 0x0 [ok]
rd: addr 0x68 data 0x0 [ok]
rd: addr 0x69 data 0x0 [ok]
rd: addr 0x6a data 0x0 [ok]
rd: addr 0x6b data 0x0 [ok]
rd: addr 0x6c data 0x0 [ok]
rd: addr 0x6d data 0x7c [ok]
rd: addr 0x6e data 0x9 [ok]
rd: addr 0x6f data 0x8 [ok]
rd: addr 0x70 data 0x9e [ok]
rd: addr 0x71 data 0x9e [ok]
rd: addr 0x72 data 0xe6 [ok]
rd: addr 0x73 data 0xf [ok]
rd: addr 0x74 data 0x0 [ok]
rd: addr 0x75 data 0xa [ok]
rd: addr 0x76 data 0x0 [ok]
rd: addr 0x77 data 0xc5 [ok]
rd: addr 0x78 data 0x0 [ok]
rd: addr 0x79 data 0x1 [ok]
rd: addr 0x7a data 0x0 [ok]
rd: addr 0x7b data 0x0 [ok]
rd: addr 0x7c data 0x80 [ok]
rd: addr 0x7d data 0xbd [ok]
rd: addr 0x7e data 0x0 [ok]
rd: addr 0x7f data 0x0 [ok]
rd: addr 0x80 data 0x0 [ok]
rd: addr 0x81 data 0x0 [ok]
rd: addr 0x82 data 0x0 [ok]
rd: addr 0x83 data 0x0 [ok]
rd: addr 0x84 data 0x0 [ok]
rd: addr 0x85 data 0x0 [ok]
rd: addr 0x86 data 0x0 [ok]
rd: addr 0x87 data 0x0 [ok]
rd: addr 0x88 data 0x0 [ok]
rd: addr 0x89 data 0x0 [ok]
rd: addr 0x8a data 0x0 [ok]
rd: addr 0x8b data 0x0 [ok]
rd: addr 0x8c data 0x0 [ok]
rd: addr 0x8d data 0x0 [ok]
rd: addr 0x8e data 0x0 [ok]
rd: addr 0x8f data 0x0 [ok]
rd: addr 0x90 data 0x0 [ok]
rd: addr 0x91 data 0x1 [ok]
rd: addr 0x92 data 0x0 [ok]
rd: addr 0x93 data 0x0 [ok]
rd: addr 0x94 data 0x14 [ok]
rd: addr 0x95 data 0x5 [ok]
rd: addr 0x96 data 0x0 [ok]
rd: addr 0x97 data 0x0 [ok]
rd: addr 0x98 data 0x0 [ok]
rd: addr 0x99 data 0x0 [ok]
rd: addr 0x9a data 0x0 [ok]
rd: addr 0x9b data 0x0 [ok]
rd: addr 0x9c data 0x0 [ok]
rd: addr 0x9d data 0x0 [ok]
rd: addr 0x9e data 0x0 [ok]
rd: addr 0x9f data 0x0 [ok]
rd: addr 0xa0 data 0x0 [ok]
rd: addr 0xa1 data 0x0 [ok]
rd: addr 0xa2 data 0x0 [ok]
rd: addr 0xa3 data 0x0 [ok]
rd: addr 0xa4 data 0x0 [ok]
rd: addr 0xa5 data 0x1c [ok]
rd: addr 0xa6 data 0x0 [ok]
rd: addr 0xa7 data 0x0 [ok]
rd: addr 0xa8 data 0x0 [ok]
rd: addr 0xa9 data 0x0 [ok]
rd: addr 0xaa data 0x0 [ok]
rd: addr 0xab data 0x0 [ok]
rd: addr 0xac data 0x0 [ok]
rd: addr 0xad data 0x0 [ok]
rd: addr 0xae data 0x0 [ok]
rd: addr 0xaf data 0x0 [ok]
rd: addr 0xb0 data 0x1c [ok]
rd: addr 0xb1 data 0x13 [ok]
rd: addr 0xb2 data 0x1f [ok]
rd: addr 0xb3 data 0x8 [ok]
rd: addr 0xb4 data 0x25 [ok]
rd: addr 0xb5 data 0x0 [ok]
rd: addr 0xb6 data 0x18 [ok]
rd: addr 0xb7 data 0x0 [ok]
rd: addr 0xb8 data 0x88 [ok]
rd: addr 0xb9 data 0x33 [ok]
rd: addr 0xba data 0x83 [ok]
rd: addr 0xbb data 0x74 [ok]
rd: addr 0xbc data 0x80 [ok]
rd: addr 0xbd data 0x0 [ok]
rd: addr 0xbe data 0x0 [ok]
rd: addr 0xbf data 0x0 [ok]
rd: addr 0xc0 data 0x0 [ok]
rd: addr 0xc1 data 0x0 [ok]
rd: addr 0xc2 data 0x0 [ok]
rd: addr 0xc3 data 0x0 [ok]
rd: addr 0xc4 data 0x0 [ok]
rd: addr 0xc5 data 0x0 [ok]
rd: addr 0xc6 data 0x0 [ok]
rd: addr 0xc7 data 0x0 [ok]
rd: addr 0xc8 data 0x0 [ok]
rd: addr 0xc9 data 0x0 [ok]
rd: addr 0xca data 0x0 [ok]
rd: addr 0xcb data 0x0 [ok]
rd: addr 0xcc data 0x0 [ok]
rd: addr 0xcd data 0x0 [ok]
rd: addr 0xce data 0x0 [ok]
rd: addr 0xcf data 0x0 [ok]
rd: addr 0xd0 data 0x0 [ok]
rd: addr 0xd1 data 0x43 [ok]
rd: addr 0xd2 data 0x94 [ok]
rd: addr 0xd3 data 0x4 [ok]
rd: addr 0xd4 data 0x60 [ok]
rd: addr 0xd5 data 0xf2 [ok]
rd: addr 0xd6 data 0x0 [ok]
rd: addr 0xd7 data 0x2 [ok]
rd: addr 0xd8 data 0x0 [ok]
rd: addr 0xd9 data 0x13 [ok]
rd: addr 0xda data 0x0 [ok]
rd: addr 0xdb data 0x0 [ok]
rd: addr 0xdc data 0x0 [ok]
rd: addr 0xdd data 0x0 [ok]
rd: addr 0xde data 0x0 [ok]
rd: addr 0xdf data 0x0 [ok]
rd: addr 0xe0 data 0x0 [ok]
rd: addr 0xe1 data 0x0 [ok]
rd: addr 0xe2 data 0x0 [ok]
rd: addr 0xe3 data 0x0 [ok]
rd: addr 0xe4 data 0x0 [ok]
rd: addr 0xe5 data 0x0 [ok]
rd: addr 0xe6 data 0x0 [ok]
rd: addr 0xe7 data 0x0 [ok]
rd: addr 0xe8 data 0x0 [ok]
rd: addr 0xe9 data 0x0 [ok]
rd: addr 0xea data 0x0 [ok]
rd: addr 0xeb data 0x0 [ok]
rd: addr 0xec data 0x0 [ok]
rd: addr 0xed data 0x0 [ok]
rd: addr 0xee data 0x0 [ok]
rd: addr 0xef data 0x0 [ok]
rd: addr 0xf0 data 0x5f [ok]
rd: addr 0xf1 data 0x55 [ok]
rd: addr 0xf2 data 0x42 [ok]
rd: addr 0xf3 data 0x39 [ok]
rd: addr 0xf4 data 0x36 [ok]
rd: addr 0xf5 data 0x30 [ok]
rd: addr 0xf6 data 0x0 [ok]
rd: addr 0xf7 data 0x0 [ok]
rd: addr 0xf8 data 0x0 [ok]
rd: addr 0xf9 data 0x0 [ok]
rd: addr 0xfa data 0x0 [ok]
rd: addr 0xfb data 0x0 [ok]
rd: addr 0xfc data 0x0 [ok]
rd: addr 0xfd data 0x0 [ok]
rd: addr 0xfe data 0x0 [ok]
rd: addr 0xff data 0x0 [ok]

    thanks

    B&R

    Yuan

  • 0 in reply to Darrah Merillat
    Prodigy 85 points

    Hi, As I known, 960 side will use 4 ports but port 2 connects to our 953. 

    "Are you saying that you are now seeing a black screen? Does the display recover or do you have to reset the entire system? Are you losing lock?"

    Yes, a black screen, but it leads by software diagnotic because 960 application detected port_pass (it will stop displaying and report error) . 960 0x4d will auto recovery ,and no need to reset entire system. No losing lock ,because I read 0x49, bit0 is always 1, but bit1 was 0x91 once. I read 0x4d of 960 constantly without delay, so I believe no losing lock and only a few bad packets detected. (using command "while true; do i2ctransfer xxxxx 0x4d r1" ;done;) , the result is below :

    0x4d:0x83
    0x4d:0x83
    0x4d:0x83
    0x4d:0x91
    0x4d:0x83
    0x4d:0x83

    "The port_pass register is not a traditional error register." So we dont't need to do diagnostic on this port_pass. Or 960 application should do some debounce , right?

  • 0 in reply to YEPENG ZHANG
    TI__Mastermind 26740 points

    Alright so the black screen is caused by the diagnostic software stopping the display intentionally, am I understanding that correctly? Register 0x4D being 0x91 would mean that lock was lost once. Bit 4 of register 0x4D is LOCK_STS_CHG, which if set means there was a change in lock since the last time the register was read, but since bit 0 is 1 the device was able to recover. How many times did you read the register? The dumps provided earlier did not have this bit set and since you've only seen this value once it does not seem to occur very often. Could you repeat reading register 0x4D multiple times to see if you can recreate the 0x91 value?

    The port_pass register is useful for diagnostics to understand the status of the system, but it does not necessarily indicate that the device is misbehaving since the pass status is related to the data going through the device. For example, if an error occurs in the imager and sends a single bad packet.

  • 0 in reply to Darrah Merillat
    Prodigy 85 points

    Hi, 

    "I read 0x4d of 960 constantly without delay" , I can recreate 0x91 and 0x81 

  • 0 in reply to YEPENG ZHANG
    Prodigy 85 points

    I think there may be some delay of i2c tool/driver ,maybe 50ms , so I can not dump "link loss" and I did same operation on register 0x52 953 side, no link loss happens.

    So if LOCK_STS_CHG assert (0x91), it means a link lost happened on 960 side. But why port_pass is not asserted, it should be 0x93 if link loss once and recover again

  • 0 in reply to YEPENG ZHANG
    TI__Mastermind 26740 points

    Pass status is asserted when the programmed conditions for pass status are met (the number of valid frames have been sent/received). Lock and pass are not directly related and will not be restored at the same time. Since the next read of the register is 0x83 you can see that pass status has been recovered again. Can you add a delay between the reads and also run the map tool to investigate the link quality between the 960 and 953? In case you need it, you can find the user guide here.

  • 0 in reply to Darrah Merillat
    Prodigy 85 points

    "link quality between the 960 and 953" , this should be tested in the car （where we can reproduce this issue）? Is it related to cable, how long FPD link support?

  • 0 in reply to YEPENG ZHANG
    TI__Mastermind 26740 points

    Are you not able to reproduce the bist errors on the bench? You mentioned that you conducted ABA tests earlier in this thread, were you swapping the entire ECU or only the 953 IC? Could you outline how you're testing/debugging currently and what the fail criteria is?

    Normally when BIST/CRC errors or an unstable lock are seen that would indicate a link quality issue between the des and ser, which could be related to the cable length or quality. Using the map tool will provide insight on what this link quality is. Additionally, could you provide the initialization and debugging/diagnostic scripts you have been using? 

  • 0 in reply to Darrah Merillat
    Prodigy 85 points

    Yes, not able on the bench. For now,  this issue happens in three car,  and it must relate to 960 diagnostic on 0x4d bit0 & bit1, sometimes there is no bist errors on 953 side.

    On 953 initializaiton, we only configure two registers, 1. 0x03:0x5b 2. 0x05:0x1b
    test script ,

    on 953,(using command "while true; do i2ctransfer xxxxx 0x52 r1" ;done;

    on 960,(using command "while true; do i2ctransfer xxxxx 0x4d r1" ;done;

  • 0 in reply to YEPENG ZHANG
    TI__Mastermind 26740 points

    If the issue is only occurring in the car, the root cause could be some sort of interference from other components in the car. When you conducted ABA tests, were these tests for the entire ECU in the car or only the 953? Is the issue the loss of pass/lock status or the bist errors? I'm understanding your situation as the 953/960 pair are operating and transmitting data, but occasionally register 0x4d, bit 0 or bit 1, will be deasserted, when this occurs there is sometimes bist errors logged, is this correct?

  • 0 in reply to Darrah Merillat
    Prodigy 85 points

    yes

    We did ABA test on ECU, replaced to three car , it can be reproduced only in car but not bench

    one possiblity is that the envirnoment(cable ,link margin) in car is critical, so some hardware deviations lead this issues

    Our 953 link margin test shows it is not  worse than other board but it is satisfied TI's standard. and we did TI953 ABA link margin test, this is follow TI953. 

  • 0 in reply to YEPENG ZHANG
    TI__Mastermind 26740 points

    So the margin test results follow the TI953? Have you done a TI953 ABA to test if the bist errors follow the TI953? This will verify if the issue is related to the IC itself or the ECU environment.

  • 0 in reply to Darrah Merillat
    Prodigy 85 points

    No, bist error can not be reproduced in bench. Since both 960 and 953 does not do diagnostic on BIST status and it is hard to know the relationship between bist and our issue (abormal port_pass and link loss bit)

  • 0 in reply to YEPENG ZHANG
    TI__Mastermind 26740 points

    Is the issue with the port pass and lock bits able to be reproduced on the bench? It sounds like the BIST error is likely due to something in the car environment. Do you have any data on how often lock is lost? Something like a percentage of reads that return lock has been lost or how long until one of the reads returns a lost lock. If it occurs sporadically over a long period of time, the error could be resulting from a specific event, but if it is constantly being lost that would imply the link is unstable. 

  • 0 in reply to Darrah Merillat
    Prodigy 85 points

    "Is the issue with the port pass and lock bits able to be reproduced on the bench?"  No

    "Do you have any data on how often lock is lost?" once in 10~60 minutes

    " If it occurs sporadically over a long period of time, the error could be resulting from a specific event, but if it is constantly being lost that would imply the link is unstable. " which event? In this TI 953-960 couple, if the link is unstable, can you provide the max parameter such as cable length ... 

  • 0 in reply to YEPENG ZHANG
    Prodigy 85 points

    Aligned with 960 side: 960 INTB will be mapped to one soc interrupt, and in int handler, port_pass and link lock will be checked.

  • 0 in reply to YEPENG ZHANG
    TI__Mastermind 26740 points

    Alright, since neither the bist or lock/pass issues can be recreated outside of the car, it seems like there is some kind of environmental factor causing the issues. It is a little difficult to determine what event exactly is causing this, especially since it can't seem to be recreated or isolated. I don't think this is a cable issue, since the MAP results did not show anything unordinary. The issue could be due to EMI

    When the ECU is in the car, in addition to the pass interrupt could you add a lock interrupt as well? This will help determine if lock is always lost when pass is deasserted or if there is a relationship between the two.

  • 0 in reply to Darrah Merillat
    Prodigy 85 points

    I did not upload MAP issue , and I read the guide you attached in E2E, it is related to deserializer, we can not do MAP test on our ECU（953）.

    About EMI, could you introduce more?

  • 0 in reply to YEPENG ZHANG
    TI__Mastermind 26740 points

    You said in a previous post in this thread that the link margin test showed that the 953 link was not worse than other boards and it satisfied TI's standards. If you did not use the MAP tool to measure the link margin, what tool did you use? The map tool is used to quantify the link health between both the serializer and the deserializer. The MAP tool may be run from the deserializer, but the link is between the deserializer and the serializer. It is the connection between the two devices that is being tested not a singular device. I can't say for certain if EMI is the issue or what the source is since there could be many components in the car environment.