DP83869HM: "XGMII_ERR_STATUS"

Hello Rajesh,

Please ignore the note. I will check on the validity of this signal and get back to you.

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Regards,
Gokul.

Any update?

Regards,

Rajesh R

Hi Rajesh,

Sorry for the delay in response.

The team is out for Diwali. I will try to get you the answers by end of Friday or the next Monday.

--
Regards,
Gokul.

Hello Gokul,

Thanks for the replying!!!

Please get the answers ASAP. I'm waiting for your reply

Regards,

Rajesh 

Hi Rajesh,

This bit will be one, when one of the FIFO queues of RGMII or SGMII are full or empty.

This can happen due to any of the following reasons.

1. Inter-Packet Gap of 12 bytes is not followed
2. Clock frequencies between MAC, PHY and LP are more than +/-100ppm

Can you please share the MAC interface you are using along with system block diagram to look further into why this issue is being caused?

--
Regards,
Gokul.

Hello Gokul,

Thanks for your replying!!!

Can you please share the MAC interface you are using along with system block diagram to look further into why this issue is being caused?

ANS: There is NO MAC interface used in our design, we used 100M media converter and below is strap setting,

we are using 100BaseTX and 100BaseFX:

SYSTEM BLOCK Diagram FOR Ethernet:

1854.SCHEMATIC1 _ 07-PHY SECTION.pdf

Regards,

Rajesh R

Hi Rajesh,

Is this the same application discussed on the following E2E thread? https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1114395/dp83869hm-we-are-not-able-make-the-link-establishment-of-rj45-to-dp83869hm/4131602#4131602

I was going through this thread and I see that the data on the fiber side is not packetized according to ethernet standards.
Has this been modified now?

When the ethernet data is not packetized, from a PHY perspective, the data doesn't have any Inter-Packet gap and that is the reason why XGMII_ERR_STATUS might have been 1.

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Regards,
Gokul.

Hello Gokul,

Thanks for replying!!!

Ethernet data is packetized. 

Whatever data comes from the RJ45 block is passed directly to the DP chip. 

So where does the inter packet gap disappears?

if we are configuring DP as 100mbps media converter, where data is coming from PC to DP chip. In such a case, where can inter packet gap issue happen?

Regards

Rajesh 

Hi Rajesh,

Got your point! I understand that the data is packetized from PC to DP83869. Is the data packetized from Fiber interface to DP83869 too?

From my understanding, this is your system PC -> DP83869 -> Fiber interface ============Fiber Cable========= Fiber Interface -> DP83869 -> PC.
Is my understanding correct?

What are the other symptoms of failure you are observing?

1. Is the link status okay?
2. Are there packet errors when you do a data transfer?

Please do share any registers logs you might have collected previously.

--
Regards.
Gokul.

Hello Gokul,

Thanks for your reply!!!

Got your point! I understand that the data is packetized from PC to DP83869. Is the data packetized from Fiber interface to DP83869 too?

From my understanding, this is your system PC -> DP83869 -> Fiber interface ============Fiber Cable========= Fiber Interface -> DP83869 -> PC.
Is my understanding correct?

Ans: Yes, correct

What are the other symptoms of failure you are observing?

1. Is the link status okay?

Ans: Pls check the below register data link status is okay or Not?

1. Are there packet errors when you do a data transfer?

Ans: we are only getting "Destination host unreachable/Request time out" response 

Please do share any registers logs you might have collected previously.

Kindly check and confirm ASAP, where is the problem. 

Regards

Rajesh

Hi Rajesh,

I see that the fiber side is not linked up. Register 0xC01 reads 6149 instead of 616D.

Let me take a look at the root causes and get back to you.

Can you please share the schematic of network and interface between fiber sides of both DP83869HM?

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Regards,
Gokul.

Hello Gokul

Thanks for your reply!!!

Below are the schematic of network Section:

3554.SCHEMATIC1 _ 07-PHY SECTION.pdf

Regards

Rajesh 

Hi Rajesh,

I am more interested in the connections of SGMII_SIP,SIN,SOP,SON. Can you please share that part of the connection?

Hi Rajesh,

Can you please try if the system is working when connecting pin 24 (SD) to 0V or ground for both the DP83869HM devices?

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Regards,
Gokul.

Hello Gokul,

Thanks for your!!!

Already connected to pin 24 (SD) to ground both DP83869HM devices.

Regards,

Rajesh

Hi Rajesh,

Thanks for the update. Can you please share the SIP/N, SOP/SON part of the connection I request above?

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Regards,
Gokul.