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DS125DF1610: Questions about daisy chaining the CLK

Part Number: DS125DF1610

Hi experts!

I’m exploring daisy chaining the clock for several DS125DF1610 (16-channel re-timers) together. My understanding from the data sheet is that the “output” clock pins, CLK_MON_P/N, are LVDS (compatible) outputs. It is not clear from the datasheet if the input clock pins, REF_CLK_P/N, include an on-chip termination.

  1. Do the input clock pins include an on-chip termination for LVDS inputs?
  2. If not, what is the recommended termination style given that the inputs must be AC coupled in differential mode?
  3. Worth asking, do the differential clock inputs HAVE to be AC coupled?

Thanks for your help!

Best regards,

Jim B

  • Hi, see inputs below,

    1. Do the input clock pins include an on-chip termination for LVDS inputs?
      • Yes, see block diagram below
    2. If not, what is the recommended termination style given that the inputs must be AC coupled in differential mode?
      • External termination not required
    3. Worth asking, do the differential clock inputs HAVE to be AC coupled?
      • It is strongly recommended. TI used AC coupling on differential clock inputs for all retimer testing as part of device characterization

    Thanks,

    Rodrigo Natal

    HSSC Applications Engineer