What dose "driver" means in Figure 32. State Diagram with Failsafe?
What's the difference between dirver on and off ?
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What dose "driver" means in Figure 32. State Diagram with Failsafe?
What's the difference between dirver on and off ?
Hi Eric,
Thank you for your reply.
There's some more questions about useing registers.
1. When LIMP is enable,LIMP_SEL_RESET = 00, is that means LIMP pin will be pulled low when the error counter count to 3?
And error counter counts to 3 means just 1 incorrect watchdog service just occured?
2. When LIMP is enable, LIMP_SEL_RESET = 01 or 10,what will LIMP pin do?
3. What will happen when LIMP is disablem, LIMP_SEL_RESET = 00 ,01 or 10?
4. Does LIMP Reset means LIMP pin goes low? If LIMP Reset occurs, dose LIMP reset will be 1? And how to clear ?
5. When nRST_nWDR_SEL = 10, pin 12 will be pulled low both when Vcc is under / over Uvcc and when watchdog event occurs ?
6. When WD_ACTON = 10, is that means both nINT is pulled low and nWDR is toggled high -> low ->high will happen when watchdog event occurs,according to 9.4.8.1 Watchdog Error Counter, "nINT is pulled low on each incorrect watchdog input while VCC and nWDR behaves according to register configuration"?
7. How to clear interrupt state in register '0h0C?
8. If DTO interrupt mask in 'h0E is 1, DTO interrupt is enable or disable?
9. Can WD_ERR_CNT be cleared or set default value by software?
Best Regards,
Ying
Ying,
First, I'd recommend the customer read through the TLIN1441 Watchdog Configuration Guide, as it will answer a lot of these questions.
1. No, it means that once the watchdog is serviced correctly three consecutive times, the LIMP pin will no longer be asserted. The error counter is set at 4 by default.
2. For 01, once the watchdog is serviced correctly once after a failure, it will de-assert the LIMP pin. 10 means that only a SPI write to the LIMP Reset bit will de-assert the LIMP pin, otherwise it will stay asserted.
3. Nothing, the LIMP pin will be disabled so it will never assert, and thus never need to be reset.
4. Yes, LIMP Reset means it will go back to a low state. Writing a 1 to the LIMP Reset bit will reset the LIMP pin and then that bit will be immediately cleared back to 0.
5. Yes, either event will trigger the nRST pin.
6. Yes, this is correct.
7. Writing 1s to the bits in the interrupt registers will clear them.
8. DTO interrupt will still be enabled internally, but it will no longer be indicated externally.
9. No, this register is read-only.
Regards,
Eric Hackett