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DS90UB954-Q1: Tell me about CSI_TX_ISR Register.

Masanori Okano
Prodigy 230 points
Part Number: DS90UB954-Q1

Hi Team,

Please tell me about the registers in DS90UB954.
I believe that if the register at address 0x36 is not enabled ("1"), "1" will not be written to the register at address 0x37 even if an interrupt occurs.
Is my understanding correct?

If my understanding is correct, I have a question.
If 0x36 is set to 0x00 and noise is irradiated, 0x37 changes to 0x03.
Before noise exposure, 0x37 is 0x00.
Does this mean that the value of 0x37 has been unintentionally changed by noise exposure?
Is this phenomenon possible?

As a test, I set 0x36 to 0x1F and irradiated it with noise, and 0x37 was 0x03.
Am I wrong in my understanding of the relationship between 0x36 and 0x37?

Best Regards,

  • +1
    TI__Mastermind 26160 points

    Hello,

    Thank you for your questions. In general interrupts must be enabled via the registers before any interrupts can be generated, but the writing to the status bits are not dependent on the interrupt being enabled. The conditions that would trigger an interrupt will be evaluated and marked in the status registers independently of the enable register. If one of the conditions is met and the register is enabled then an interrupt will be generated. So in regards to the relationship between 0x36 and 0x37, 0x37 is the status register that updates when the condition occurs and 0x36 is the enabling register that determines if an interrupt will be generated when the condition occurs. Since you irradiated with noise for both test cases, 0x37 updated accordingly both times.

    For more information on interrupts and examples you can refer to section 7.5.8 of the datasheet.

    Regards,

    Darrah

  • 0 in reply to Darrah Merillat
    Prodigy 230 points

    Hi Darrah,

    Thank you for your response.
    I understand and I will mark it as resolved.

    Regards,