Dear Team,
We are using SN64DSI84 in our project and bringing up the LVDS panel right now.
Currently REFCLK is DSI clock(495MHz), and expected LVDS clock is 72MHz.
As data sheet mentioned, should keep REFCLK_MULTIPLIER to 0 while using
DSI clock being clock source.
For our case, the clock source setting and video porch setting are already configured well.
But we still need to set REFCLK_MULTIPLIER to X2 to make panel work.
Attached SN65 I2C setting.
Can you help to explain this issue?
https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/138/script.sh
