Hi team,
customer use SN75DP159 as DP retimer and use AUX_SRC_P/N to output DP reference clock.
when customer test 4KDP vedio input and output reference clock is 270MHz, customer found at clock receiver point, the duty cycle of clock is around 37%, which doesn't match customer requirement.
Customer is wondering if we have any specs of output reference clock and if customer can configure any registers to change the duty cycle and drive current of output clock.
Thanks!
BR.
Rayna
