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TCAL9539: debounce immune ?

Dmitry Bandurian
Prodigy 70 points
Part Number: TCAL9539

Hi ,     the chip   TCAL9539   that  process  Keypads inputs,   has not  debounce immune ???   And in chapter 8.3.2 Adjustable Output Drive Strength   something wrong  at  Figure 8-3 .    

  • 0
    Guru 317370 points

    This device has plain CMOS inputs; there are neither Schmitt-trigger inputs nor debounce functionality.

    Figure 8-3 is not in section 8.3.2. What is the problem?

  • 0
    TI__Mastermind 48308 points

    Hi Dmitry,

    TCAL9539 does not offer debounce immunity nor schmitt-trigger inputs as stated by Clemens. As for figure 8-3, are you looking at this region in the image?

    This diagram should probably be more specific as to what is going on in the middle of the transaction. At first glance, it looks like the user is setting up a start condition, transmitting one bit, and immediately sending a stop condition. This is not common I2C practice. The main purpose of figure 8-3 is to show what the definition of a start and stop condition is. We don't really care what is happening in between these two points, if your concern was about the blue region that I circled. 

    Regards,

    Tyler

  • 0
    Prodigy 70 points

    Okey, I got about debounce.   But  most  of  problem  with keypad, buttons,  it is a debounce,  in general,  if debounce problem hasn't ,  I connect  all buttons to  GPIO  of MC  and  the problem solved and don't  got to process of   I2C,  SPI .   The problem is  a debounce.

    The second,  this text from  PDF

    8.3.2 Adjustable Output Drive Strength The Output drive strength registers allow the user to control the drive level of the GPIO. Each GPIO can be configured independently to one of the four possible current levels. By programming these bits the user is changing the number of transistor pairs or 'fingers' that drive the I/O pad. Figure 8-3 shows a simplified output stage.

    That mean  the Figure 8-3  must  show  GPIO in/out   pin.   But  in real  the Figure 8-3   show  I2C  pins.   That I had pointed. 

    Thank you.

  • 0 in reply to Dmitry Bandurian
    Guru 317370 points

    This reference to figure 8-3 is wrong; there is no figure that shows different transistor pairs.

    (And the description of registers 40…43 in section 8.6.3 refers to section 9.2 "for more details", but that section does not have any details.)

    The datasheet says "ADVANCE INFORMATION".

  • 0 in reply to Dmitry Bandurian
    TI__Mastermind 48308 points

    Hi Dmitry,

    I see your point now about figure 8-3 from section 8.3.2 in the datasheet. We have made note of the error on our end and will work to get that fixed. We will also look into register descriptions listed in section 8.6.3. 

    Regards,

    Tyler