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SN75LVPE5421: Is it feasible for x8 PCIe signals with only x4 go through PCIe MUX?

Clement Lee
Prodigy 10 points
Part Number: SN75LVPE5421

Hi TI members,

We are having a survey on using TI PCIe MUX(SN75LVPE5421) in our design.

But in our application, we use one x8 PCIe Gen5 port coming from CPU and only x4 of them route into PCIe MUX.

The other x4 doesn't go through PCIe MUX.

But in the end device, we will still combine the two x4 into one x8 device.

Which means in x8 signals there will be x4 having a delay in PCIe MUX, the other x4 won't.

I've checked the spec, there is 90~130 ps latency in MUX.

Does TI used to have a study on this? And if it is feasible?

Also, we are thinking if need to route with different length on each x4 for timing compensation.

Would need TI's suggestion on this.

Appreciate!

Best Ragards,

Clement Lee 

  • 0
    TI__Guru* 93670 points

    Hi Clement,

    In PCIe applications, negotiation begins with RX detect process. Given your application, it means there is a possibility were RX detect completion through the mux could be different from signal path that does not go through the mux. This may cause issue for the root complex or the end point. However, this is highly depends on the root complex or end point being used. Our recommendation is to have all signal to go through mux. Or as noted this depends on the system and your block diagram may work based on your root complex and the end point for this application.

    Regards,nasser