TFP410: TFP410 data signals mapping to LT

Hi, 

In our project, we are interfacing TFP410 with Xilinx FPGA . The IO bank voltage of FPGA will support up to 1.8V only. We need to map Data signals to FPGA, we are using SN74AVC32T245  as Level Translator. So, DIR signals of LT, connecting to VCCA (1.8V), shall we connect this to VCCA directly of Pull up resistor is required or not? If required, what will be the value? 

Thanks